mpc83xx: correctly set encryption and I2C bus 0 clock

This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.

Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 491c2e5c3b22fbcd1db3b8b487fc1e2d9351d010..8e9c875599efdd403d3e08fb9d30a3dde1c1cc27 100644 (file)
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -106,7 +106,7 @@ void cpu_init_f (volatile immap_t * im)
 #ifdef CONFIG_SYS_SCCR_ENCCM
        /* Encryption clock mode */
        im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) |
-                      (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT);
+                      (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT);
 #endif
 
 #ifdef CONFIG_SYS_SCCR_PCICM