x86: Move common fsp functions into a common file

Some of this file can be shared between FSP1 and FSP2. Move it into a
shared file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h
index 215b0f7c9d5d9de30fb5862a3a78be7504669a25..8dea2e71ea955c9007f94b0bc521867951c3d764 100644 (file)
--- a/arch/x86/include/asm/fsp/fsp_support.h
+++ b/arch/x86/include/asm/fsp/fsp_support.h
@@ -131,4 +131,21 @@ int fsp_init_phase_pci(void);
  */
 int fsp_scan_for_ram_size(void);
 
+/**
+ * fsp_prepare_mrc_cache() - Find the DRAM training data from the MRC cache
+ *
+ * @return pointer to data, or NULL if no cache or no data found in the cache
+ */
+void *fsp_prepare_mrc_cache(void);
+
+/**
+ * fsp_notify() - FSP notification wrapper function
+ *
+ * @fsp_hdr: Pointer to FSP information header
+ * @phase:   FSP initialization phase defined in enum fsp_phase
+ *
+ * @return compatible status code with EFI_STATUS defined in PI spec
+ */
+u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase);
+
 #endif

diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h
index 236c167fc865a109573e72e335d1d7fa2a7d559b..a44a5504a4f8bf71aad729a5f687b244130e2258 100644 (file)
--- a/arch/x86/include/asm/fsp1/fsp_support.h
+++ b/arch/x86/include/asm/fsp1/fsp_support.h
@@ -46,16 +46,6 @@ void fsp_continue(u32 status, void *hob_list);
  */
 void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf);
 
-/**
- * fsp_notify() - FSP notification wrapper function
- *
- * @fsp_hdr: Pointer to FSP information header
- * @phase:   FSP initialization phase defined in enum fsp_phase
- *
- * @return compatible status code with EFI_STATUS defined in PI spec
- */
-u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase);
-
 /**
  * fsp_get_bootloader_tmp_mem() - retrieves temporary stack buffer and size
  *

diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile
index e2160653def35941d21e853e890e754d8310ae75..e7a8427c2ec94ad216257d4b30bd557736cdc4b6 100644 (file)
--- a/arch/x86/lib/fsp/Makefile
+++ b/arch/x86/lib/fsp/Makefile
@@ -2,4 +2,5 @@
 #
 # Copyright 2019 Google LLC
 
+obj-y += fsp_common.o
 obj-y += fsp_dram.o

diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
new file mode 100644 (file)
index 0000000..6678d75
--- /dev/null
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <rtc.h>
+#include <asm/acpi_s3.h>
+#include <asm/cmos_layout.h>
+#include <asm/early_cmos.h>
+#include <asm/io.h>
+#include <asm/mrccache.h>
+#include <asm/post.h>
+#include <asm/processor.h>
+#include <asm/fsp/fsp_support.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkcpu(void)
+{
+       return 0;
+}
+
+int print_cpuinfo(void)
+{
+       post_code(POST_CPU_INFO);
+       return default_print_cpuinfo();
+}
+
+int fsp_init_phase_pci(void)
+{
+       u32 status;
+
+       /* call into FspNotify */
+       debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
+       status = fsp_notify(NULL, INIT_PHASE_PCI);
+       if (status)
+               debug("fail, error code %x\n", status);
+       else
+               debug("OK\n");
+
+       return status ? -EPERM : 0;
+}
+
+void board_final_cleanup(void)
+{
+       u32 status;
+
+       /* call into FspNotify */
+       debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
+       status = fsp_notify(NULL, INIT_PHASE_BOOT);
+       if (status)
+               debug("fail, error code %x\n", status);
+       else
+               debug("OK\n");
+}
+
+void *fsp_prepare_mrc_cache(void)
+{
+       struct mrc_data_container *cache;
+       struct mrc_region entry;
+       int ret;
+
+       ret = mrccache_get_region(NULL, &entry);
+       if (ret)
+               return NULL;
+
+       cache = mrccache_find_current(&entry);
+       if (!cache)
+               return NULL;
+
+       debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
+             cache->data, cache->data_size, cache->checksum);
+
+       return cache->data;
+}
+
+#ifdef CONFIG_HAVE_ACPI_RESUME
+int fsp_save_s3_stack(void)
+{
+       struct udevice *dev;
+       int ret;
+
+       if (gd->arch.prev_sleep_state == ACPI_S3)
+               return 0;
+
+       ret = uclass_get_device(UCLASS_RTC, 0, &dev);
+       if (ret) {
+               debug("Cannot find RTC: err=%d\n", ret);
+               return -ENODEV;
+       }
+
+       /* Save the stack address to CMOS */
+       ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
+       if (ret) {
+               debug("Save stack address to CMOS: err=%d\n", ret);
+               return -EIO;
+       }
+
+       return 0;
+}
+#endif

diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c
index bfd76dccbabe6a872842829e8192561620545df1..285ef72ebf8ca8b9b7ab101b3b0ea63c0f2fea44 100644 (file)
--- a/arch/x86/lib/fsp1/fsp_common.c
+++ b/arch/x86/lib/fsp1/fsp_common.c
@@ -18,93 +18,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int checkcpu(void)
-{
-       return 0;
-}
-
-int print_cpuinfo(void)
-{
-       post_code(POST_CPU_INFO);
-       return default_print_cpuinfo();
-}
-
-int fsp_init_phase_pci(void)
-{
-       u32 status;
-
-       /* call into FspNotify */
-       debug("Calling into FSP (notify phase INIT_PHASE_PCI): ");
-       status = fsp_notify(NULL, INIT_PHASE_PCI);
-       if (status)
-               debug("fail, error code %x\n", status);
-       else
-               debug("OK\n");
-
-       return status ? -EPERM : 0;
-}
-
-void board_final_cleanup(void)
-{
-       u32 status;
-
-       /* call into FspNotify */
-       debug("Calling into FSP (notify phase INIT_PHASE_BOOT): ");
-       status = fsp_notify(NULL, INIT_PHASE_BOOT);
-       if (status)
-               debug("fail, error code %x\n", status);
-       else
-               debug("OK\n");
-
-       return;
-}
-
-static __maybe_unused void *fsp_prepare_mrc_cache(void)
-{
-       struct mrc_data_container *cache;
-       struct mrc_region entry;
-       int ret;
-
-       ret = mrccache_get_region(NULL, &entry);
-       if (ret)
-               return NULL;
-
-       cache = mrccache_find_current(&entry);
-       if (!cache)
-               return NULL;
-
-       debug("%s: mrc cache at %p, size %x checksum %04x\n", __func__,
-             cache->data, cache->data_size, cache->checksum);
-
-       return cache->data;
-}
-
-#ifdef CONFIG_HAVE_ACPI_RESUME
-int fsp_save_s3_stack(void)
-{
-       struct udevice *dev;
-       int ret;
-
-       if (gd->arch.prev_sleep_state == ACPI_S3)
-               return 0;
-
-       ret = uclass_get_device(UCLASS_RTC, 0, &dev);
-       if (ret) {
-               debug("Cannot find RTC: err=%d\n", ret);
-               return -ENODEV;
-       }
-
-       /* Save the stack address to CMOS */
-       ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp);
-       if (ret) {
-               debug("Save stack address to CMOS: err=%d\n", ret);
-               return -EIO;
-       }
-
-       return 0;
-}
-#endif
-
 int arch_fsp_init(void)
 {
        void *nvs;