]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: r8a774a1: Import DTS queued for Linux 5.12-rc1
authorAdam Ford <aford173@gmail.com>
Wed, 3 Feb 2021 12:57:16 +0000 (06:57 -0600)
committerMarek Vasut <marek.vasut+renesas@gmail.com>
Sun, 7 Feb 2021 20:12:57 +0000 (21:12 +0100)
Update the RZ/G2M dtsi and r8a774a1-beacon-rzg2m-kit kit
from Renesas repo destined to become 5.12-rc1.

Signed-off-by: Adam Ford <aford173@gmail.com>
arch/arm/dts/beacon-renesom-baseboard.dtsi
arch/arm/dts/beacon-renesom-som.dtsi
arch/arm/dts/r8a774a1-beacon-rzg2m-kit.dts
arch/arm/dts/r8a774a1.dtsi

index 8a472c057a98946ae30f76028b21ff0290bbdda2..5f998d470648c832ca4628a1c71aa26d2bcd6ff2 100644 (file)
@@ -5,35 +5,27 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/clk/versaclock.h>
 
 / {
-       aliases {
-               serial0 = &scif2;
-               serial1 = &hscif0;
-               serial2 = &hscif1;
-               serial3 = &scif0;
-               serial4 = &hscif2;
-               serial5 = &scif5;
-               spi0 = &msiof0;
-               spi1 = &msiof1;
-               spi2 = &msiof2;
-               spi3 = &msiof3;
-               ethernet0 = &avb;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       backlight: backlight {
+       backlight_lvds: backlight-lvds {
                compatible = "pwm-backlight";
                power-supply = <&reg_lcd>;
                enable-gpios = <&gpio_exp1 3 GPIO_ACTIVE_HIGH>;
-               pwms = <&pwm0 0 50000>;
+               pwms = <&pwm2 0 25000>;
                brightness-levels = <0 4 8 16 32 64 128 255>;
                default-brightness-level = <6>;
        };
 
+       backlight_dpi: backlight-dpi {
+               compatible = "pwm-backlight";
+               power-supply = <&reg_lcd>;
+               enable-gpios = <&gpio_exp1 7 GPIO_ACTIVE_LOW>;
+               pwms = <&pwm0 0 25000>;
+               brightness-levels = <0 25 33 50 63 75 88 100>;
+               default-brightness-level = <6>;
+       };
+
        hdmi0-out {
                compatible = "hdmi-connector";
                type = "a";
        keys {
                compatible = "gpio-keys";
 
-               key-1 {
+               key-1 { /* S19 */
                        gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_1>;
-                       label = "Switch-1";
+                       linux,code = <KEY_UP>;
+                       label = "Up";
                        wakeup-source;
                        debounce-interval = <20>;
                };
-               key-2 {
+               key-2 { /*S20 */
                        gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_2>;
-                       label = "Switch-2";
+                       linux,code = <KEY_LEFT>;
+                       label = "Left";
                        wakeup-source;
                        debounce-interval = <20>;
                };
-               key-3 {
+               key-3 { /* S21 */
                        gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_3>;
-                       label = "Switch-3";
+                       linux,code = <KEY_DOWN>;
+                       label = "Down";
                        wakeup-source;
                        debounce-interval = <20>;
                };
-               key-4 {
+               key-4 { /* S22 */
                        gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_4>;
-                       label = "Switch-4";
+                       linux,code = <KEY_RIGHT>;
+                       label = "Right";
                        wakeup-source;
                        debounce-interval = <20>;
                };
-               key-5 {
+               key-5 { /* S23 */
                        gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
-                       linux,code = <KEY_5>;
-                       label = "Switch-4";
+                       linux,code = <KEY_ENTER>;
+                       label = "Center";
                        wakeup-source;
                        debounce-interval = <20>;
                };
                led1 {
                        gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
                        label = "LED1";
-                       linux,default-trigger = "heartbeat";
                };
                led2 {
                        gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
                        label = "LED2";
-                       linux,default-trigger = "heartbeat";
                };
                led3 {
                        gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
                        label = "LED3";
-                       linux,default-trigger = "heartbeat";
+               };
+       };
+
+       lvds {
+               compatible = "panel-lvds";
+               power-supply = <&reg_lcd_reset>;
+               width-mm = <223>;
+               height-mm = <125>;
+               backlight = <&backlight_lvds>;
+               data-mapping = "vesa-24";
+
+               panel-timing {
+                       /* 800x480@60Hz */
+                       clock-frequency = <30000000>;
+                       hactive = <800>;
+                       vactive = <480>;
+                       hsync-len = <48>;
+                       hfront-porch = <40>;
+                       hback-porch = <40>;
+                       vfront-porch = <13>;
+                       vback-porch = <29>;
+                       vsync-len = <1>;
+                       hsync-active = <1>;
+                       vsync-active = <3>;
+                       de-active = <1>;
+                       pixelclk-active = <0>;
+               };
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&lvds0_out>;
+                       };
+               };
+       };
+
+       rgb {
+               /* Different LCD with compatible timings */
+               compatible = "rocktech,rk070er9427";
+               backlight = <&backlight_dpi>;
+               enable-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+               power-supply = <&reg_lcd>;
+               port {
+                       rgb_panel: endpoint {
+                               remote-endpoint = <&du_out_rgb>;
+                       };
                };
        };
 
                regulator-name = "audio-1.8V";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <1800000>;
-               gpio = <&gpio_exp2 7 GPIO_ACTIVE_HIGH>;
+               gpio = <&gpio_exp4 1 GPIO_ACTIVE_HIGH>;
                enable-active-high;
        };
 
 
        vccq_sdhi0: regulator-vccq-sdhi0 {
                compatible = "regulator-gpio";
-
                regulator-name = "SDHI0 VccQ";
                regulator-min-microvolt = <1800000>;
                regulator-max-microvolt = <3300000>;
-
                gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
                gpios-states = <1>;
                states = <3300000 1>, <1800000 0>;
-               regulator-always-on;
        };
 
        /* External DU dot clocks */
                #clock-cells = <0>;
                clock-frequency = <25000000>;
        };
-};
 
-&audio_clk_a {
-       clock-frequency = <22579200>;
+       connector {
+               compatible = "usb-c-connector";
+               label = "USB-C";
+               data-role = "dual";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       port@0 {
+                               reg = <0>;
+                               hs_ep: endpoint {
+                                       remote-endpoint = <&usb3_hs_ep>;
+                               };
+                       };
+                       port@1 {
+                               reg = <1>;
+                               ss_ep: endpoint {
+                                       remote-endpoint = <&hd3ss3220_in_ep>;
+                               };
+                       };
+               };
+       };
 };
 
 &audio_clk_b {
        status = "okay";
 };
 
-&du {
-       pinctrl-0 = <&du_pins>;
-       pinctrl-names = "default";
-       status = "okay";
-
-       clocks = <&cpg CPG_MOD 724>,
-               <&cpg CPG_MOD 723>,
-               <&cpg CPG_MOD 722>,
-               <&versaclock5 1>,
-               <&x302_clk>,
-               <&versaclock5 2>;
-       clock-names = "du.0", "du.1", "du.2",
-               "dclkin.0", "dclkin.1", "dclkin.2";
+&du_out_rgb {
+       remote-endpoint = <&rgb_panel>;
 };
 
 &ehci0 {
        dr_mode = "otg";
        status = "okay";
-       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>, <&versaclock6_bb 4>;
+       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 3>;
 };
 
 &ehci1 {
        status = "okay";
-       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, <&versaclock5 4>;
+       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 };
 
 &hdmi0 {
                        };
                };
                port@2 {
-                       /* HDMI sound */
                        reg = <2>;
                        dw_hdmi0_snd_in: endpoint {
                                remote-endpoint = <&rsnd_endpoint1>;
 
 &i2c2 {
        status = "okay";
-       clock-frequency = <100000>;
+       clock-frequency = <400000>;
        pinctrl-0 = <&i2c2_pins>;
        pinctrl-names = "default";
 
                #gpio-cells = <2>;
        };
 
-       versaclock6_bb: versaclock6_bb@6a {
+       gpio_exp4: gpio@23 {
+               compatible = "onnn,pca9654";
+               reg = <0x23>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       versaclock6_bb: clock-controller@6a {
                compatible = "idt,5p49v6965";
                reg = <0x6a>;
                #clock-cells = <1>;
                clocks = <&x304_clk>;
                clock-names = "xin";
-               /* CSI0_MCLK, CSI1_MCLK, AUDIO_CLKIN, USB_HUB_MCLK_BB */
+
                assigned-clocks = <&versaclock6_bb 1>,
                                   <&versaclock6_bb 2>,
                                   <&versaclock6_bb 3>,
                                   <&versaclock6_bb 4>;
-               assigned-clock-rates =  <24000000>, <24000000>, <24000000>, <24000000>;
+               assigned-clock-rates =  <24000000>, <24000000>, <24000000>, <24576000>;
+
+               OUT1 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <1800000>;
+                       idt,slew-percent = <100>;
+               };
+
+               OUT2 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <1800000>;
+                       idt,slew-percent = <100>;
+               };
+
+               OUT3 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <3300000>;
+                       idt,slew-percent = <100>;
+               };
+
+               OUT4 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <3300000>;
+                       idt,slew-percent = <100>;
+               };
        };
 };
 
 
 &i2c5 {
        status = "okay";
-       clock-frequency = <100000>;
+       clock-frequency = <400000>;
        pinctrl-0 = <&i2c5_pins>;
        pinctrl-names = "default";
 
        codec: wm8962@1a {
                compatible = "wlf,wm8962";
                reg = <0x1a>;
+               clocks = <&versaclock6_bb 3>;
                DCVDD-supply = <&reg_audio>;
                DBVDD-supply = <&reg_audio>;
                AVDD-supply = <&reg_audio>;
                interrupts = <9 IRQ_TYPE_EDGE_RISING>;
                wakeup-source;
        };
+
+       hd3ss3220@47 {
+               compatible = "ti,hd3ss3220";
+               reg = <0x47>;
+               interrupt-parent = <&gpio6>;
+               interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       port@0 {
+                               reg = <0>;
+                               hd3ss3220_in_ep: endpoint {
+                                       remote-endpoint = <&ss_ep>;
+                               };
+                       };
+                       port@1 {
+                               reg = <1>;
+                               hd3ss3220_out_ep: endpoint {
+                                       remote-endpoint = <&usb3_role_switch>;
+                               };
+                       };
+               };
+       };
+};
+
+&lvds0 {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       lvds0_out: endpoint {
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
+       };
+};
+
+&msiof1 {
+       pinctrl-0 = <&msiof1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+       cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
 };
 
 &ohci0 {
                function = "pwm0";
        };
 
+       pwm2_pins: pwm2 {
+               groups = "pwm2_a";
+               function = "pwm2";
+       };
+
        sdhi0_pins: sd0 {
                groups = "sdhi0_data4", "sdhi0_ctrl";
                function = "sdhi0";
        };
 
        sound_clk_pins: sound_clk {
-               groups = "audio_clk_a_a";
+               groups = "audio_clk_a_a", "audio_clk_b_a";
                function = "audio_clk";
        };
 
        status = "okay";
 };
 
+&pwm2 {
+       pinctrl-0 = <&pwm2_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
 &rcar_sound {
        pinctrl-0 = <&sound_pins &sound_clk_pins>;
        pinctrl-names = "default";
 
        status = "okay";
 
-       clocks = <&cpg CPG_MOD 1005>,
-                <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
-                <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
-                <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
-                <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
-                <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
-                <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
-                <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
-                <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
-                <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
-                <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
-                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
-                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
-                <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
-                <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
-
        ports {
                #address-cells = <1>;
                #size-cells = <0>;
        };
 };
 
+&rwdt {
+       status = "okay";
+       timeout-sec = <60>;
+};
+
 &scif0 {
        pinctrl-0 = <&scif0_pins>;
        pinctrl-names = "default";
        shared-pin;
 };
 
+&tmu0 {
+       status = "okay";
+};
+
+&tmu1 {
+       status = "okay";
+};
+
+&tmu2 {
+       status = "okay";
+};
+
+&tmu3 {
+       status = "okay";
+};
+
+&tmu4 {
+       status = "okay";
+};
+
 &usb2_phy0 {
        pinctrl-0 = <&usb0_pins>;
        pinctrl-names = "default";
        pinctrl-names = "default";
        status = "okay";
 };
+
+&usb3_peri0 {
+       companion = <&xhci0>;
+       status = "okay";
+       usb-role-switch;
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               port@0 {
+                       reg = <0>;
+                       usb3_hs_ep: endpoint {
+                               remote-endpoint = <&hs_ep>;
+                       };
+               };
+               port@1 {
+                       reg = <1>;
+                       usb3_role_switch: endpoint {
+                               remote-endpoint = <&hd3ss3220_out_ep>;
+                       };
+               };
+       };
+};
+
+&usb3_phy0 {
+       status = "okay";
+};
+
+&vin0 {
+       status = "okay";
+};
+&vin1 {
+       status = "okay";
+};
+&vin2 {
+       status = "okay";
+};
+&vin3 {
+       status = "okay";
+};
+&vin4 {
+       status = "okay";
+};
+&vin5 {
+       status = "okay";
+};
+&vin6 {
+       status = "okay";
+};
+&vin7 {
+       status = "okay";
+};
+
+&xhci0
+{
+       pinctrl-0 = <&usb30_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
index 6c16a2732a8deee7295c1ff9f7422321dc776e2b..9565495b495b456325fee7e56061cbce3525ccef 100644 (file)
@@ -4,17 +4,18 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clk/versaclock.h>
 
 / {
        memory@48000000 {
                device_type = "memory";
                /* first 128MB is reserved for secure area. */
-               reg = <0x0 0x48000000 0x0 0x78000000>;
+               reg = <0x0 0x48000000 0x0 0xc000000>;
        };
 
-       memory@600000000 {
+       memory@57000000 {
                device_type = "memory";
-               reg = <0x6 0x00000000 0x0 0x80000000>;
+               reg = <0x0 0x57000000 0x0 0x29000000>;
        };
 
        osc_32k: osc_32k {
@@ -55,7 +56,8 @@
        pinctrl-0 = <&avb_pins>;
        pinctrl-names = "default";
        phy-handle = <&phy0>;
-       phy-mode = "rgmii-id";
+       rx-internal-delay-ps = <1800>;
+       tx-internal-delay-ps = <2000>;
        status = "okay";
 
        phy0: ethernet-phy@0 {
@@ -88,7 +90,6 @@
        pinctrl-names = "default";
        uart-has-rtscts;
        status = "okay";
-       max-speed = <4000000>;
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
@@ -97,6 +98,7 @@
                device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
                clocks = <&osc_32k>;
                clock-names = "extclk";
+               max-speed = <4000000>;
        };
 };
 
 
 &i2c4 {
        status = "okay";
-       clock-frequency = <400000>;
+       clock-frequency = <100000>;
 
        pca9654: gpio@20 {
                compatible = "onnn,pca9654";
        };
 
        eeprom@50 {
-               compatible = "microchip, at24c64", "atmel,24c64";
+               compatible = "microchip,at24c64", "atmel,24c64";
                pagesize = <32>;
                read-only;      /* Manufacturing EEPROM programmed at factory */
                reg = <0x50>;
                                   <&versaclock5 2>,
                                   <&versaclock5 3>,
                                   <&versaclock5 4>;
+
                assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
+
+               OUT1 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <1800000>;
+                       idt,slew-percent = <100>;
+               };
+
+               OUT2 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <1800000>;
+                       idt,slew-percent = <100>;
+               };
+
+               OUT3 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <1800000>;
+                       idt,slew-percent = <100>;
+               };
+
+               OUT4 {
+                       idt,mode = <VC5_CMOS>;
+                       idt,voltage-microvolt = <3300000>;
+                       idt,slew-percent = <100>;
+               };
        };
 };
 
        status = "okay";
 };
 
-&usb_extal_clk {
-       clock-frequency = <50000000>;
+&usb2_clksel {
+       status = "okay";
+       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
+                <&versaclock5 3>, <&usb3s0_clk>;
+       clock-names = "ehci_ohci", "hs-usb-if",
+                     "usb_extal", "usb_xtal";
 };
 
 &usb3s0_clk {
        clock-frequency = <100000000>;
 };
-
-&vspb {
-       status = "okay";
-};
-
-&vspi0 {
-       status = "okay";
-};
index e7ed5d4806183d975d6ec5d425b0eadaa5f92a35..501cb05da228de6c5517a946c06ccf7958bed86e 100644 (file)
 #include "beacon-renesom-baseboard.dtsi"
 
 / {
-       model = "Beacon Embedded Works RZ/G2M Development Kit";
-       compatible =    "beacon,beacon-rzg2m", "renesas,r8a774a1";
+       model = "Beacon EmbeddedWorks RZ/G2M Development Kit";
+       compatible = "beacon,beacon-rzg2m", "renesas,r8a774a1";
+
+       aliases {
+               serial0 = &scif2;
+               serial1 = &hscif0;
+               serial2 = &hscif1;
+               serial3 = &scif0;
+               serial4 = &hscif2;
+               serial5 = &scif5;
+               ethernet0 = &avb;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@600000000 {
+               device_type = "memory";
+               reg = <0x6 0x00000000 0x0 0x80000000>;
+       };
+};
+
+&du {
+       pinctrl-0 = <&du_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       clocks = <&cpg CPG_MOD 724>,
+                <&cpg CPG_MOD 723>,
+                <&cpg CPG_MOD 722>,
+                <&versaclock5 1>,
+                <&x302_clk>,
+                <&versaclock5 2>;
+       clock-names = "du.0", "du.1", "du.2",
+                     "dclkin.0", "dclkin.1", "dclkin.2";
+};
+
+/* Reference versaclock instead of audio_clk_a */
+&rcar_sound {
+       clocks = <&cpg CPG_MOD 1005>,
+                <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
+                <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
+                <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
+                <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
+                <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
+                <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
+                <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
+                <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
+                <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
+                <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+                <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
+                <&versaclock6_bb 4>, <&audio_clk_b>,
+                <&audio_clk_c>,
+                <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
 };
index 8e80f50132ad55f54b77b01f65214cc0c7c455ba..d64fb8b1b86c37318a8b63abdd4630b0b954f9fc 100644 (file)
                        resets = <&cpg 905>;
                };
 
-               pfc: pin-controller@e6060000 {
+               pfc: pinctrl@e6060000 {
                        compatible = "renesas,pfc-r8a774a1";
                        reg = <0 0xe6060000 0 0x50c>;
                };
                        status = "disabled";
                };
 
+               usb2_clksel: clock-controller@e6590630 {
+                       compatible = "renesas,r8a774a1-rcar-usb2-clock-sel",
+                                    "renesas,rcar-gen3-usb2-clock-sel";
+                       reg = <0 0xe6590630 0 0x02>;
+                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
+                                <&usb_extal_clk>, <&usb3s0_clk>;
+                       clock-names = "ehci_ohci", "hs-usb-if",
+                                     "usb_extal", "usb_xtal";
+                       #clock-cells = <0>;
+                       power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
+                       resets = <&cpg 703>, <&cpg 704>;
+                       reset-names = "ehci_ohci", "hs-usb-if";
+                       status = "disabled";
+               };
+
                usb_dmac0: dma-controller@e65a0000 {
                        compatible = "renesas,r8a774a1-usb-dmac",
                                     "renesas,usb-dmac";
                        power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
+                       rx-internal-delay-ps = <0>;
+                       tx-internal-delay-ps = <0>;
                        iommus = <&ipmmu_ds0 16>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "disabled";
                };
 
+               rpc: spi@ee200000 {
+                       compatible = "renesas,r8a774a1-rpc-if",
+                                    "renesas,rcar-gen3-rpc-if";
+                       reg = <0 0xee200000 0 0x200>,
+                             <0 0x08000000 0 0x4000000>,
+                             <0 0xee208000 0 0x100>;
+                       reg-names = "regs", "dirmap", "wbuf";
+                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       clock-names = "rpc";
+                       power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
+                       resets = <&cpg 917>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                gic: interrupt-controller@f1010000 {
                        compatible = "arm,gic-400";
                        #interrupt-cells = <3>;
                        status = "disabled";
                };
 
+               pciec0_ep: pcie-ep@fe000000 {
+                       compatible = "renesas,r8a774a1-pcie-ep",
+                                    "renesas,rcar-gen3-pcie-ep";
+                       reg = <0x0 0xfe000000 0 0x80000>,
+                             <0x0 0xfe100000 0 0x100000>,
+                             <0x0 0xfe200000 0 0x200000>,
+                             <0x0 0x30000000 0 0x8000000>,
+                             <0x0 0x38000000 0 0x8000000>;
+                       reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 319>;
+                       clock-names = "pcie";
+                       resets = <&cpg 319>;
+                       power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
+                       status = "disabled";
+               };
+
+               pciec1_ep: pcie-ep@ee800000 {
+                       compatible = "renesas,r8a774a1-pcie-ep",
+                                    "renesas,rcar-gen3-pcie-ep";
+                       reg = <0x0 0xee800000 0 0x80000>,
+                             <0x0 0xee900000 0 0x100000>,
+                             <0x0 0xeea00000 0 0x200000>,
+                             <0x0 0xc0000000 0 0x8000000>,
+                             <0x0 0xc8000000 0 0x8000000>;
+                       reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
+                       interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 318>;
+                       clock-names = "pcie";
+                       resets = <&cpg 318>;
+                       power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>;
+                       status = "disabled";
+               };
+
                fdp1@fe940000 {
                        compatible = "renesas,fdp1";
                        reg = <0 0xfe940000 0 0x2400>;