net: stm32: add designware mac glue code for stm32

This patch adds glue code required for enabling the designware
mac on stm32f7 devices.

Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
index 9b315a8c636ee8a361502bcdf3a64faf8a846c1b..508b5f27169a640ea520239919f5adcc0f286021 100644 (file)
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
@@ -36,6 +36,7 @@ enum periph_clock {
        SYSCFG_CLOCK_CFG,
        TIMER2_CLOCK_CFG,
        FMC_CLOCK_CFG,
+       STMMAC_CLOCK_CFG,
 };
 
 #endif /* __ASM_ARM_ARCH_PERIPH_H */

diff --git a/arch/arm/include/asm/arch-stm32f7/syscfg.h b/arch/arm/include/asm/arch-stm32f7/syscfg.h
new file mode 100644 (file)
index 0000000..49e78f2
--- /dev/null
+++ b/arch/arm/include/asm/arch-stm32f7/syscfg.h
@@ -0,0 +1,38 @@
+/*
+ * (C) Copyright 2016
+ * Michael Kurz, michi.kurz@gmail.com.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef _STM32_SYSCFG_H
+#define _STM32_SYSCFG_H
+
+struct stm32_syscfg_regs {
+       u32 memrmp;
+       u32 pmc;
+       u32 exticr1;
+       u32 exticr2;
+       u32 exticr3;
+       u32 exticr4;
+       u32 cmpcr;
+};
+
+/*
+ * SYSCFG registers base
+ */
+#define STM32_SYSCFG           ((struct stm32_syscfg_regs *)STM32_SYSCFG_BASE)
+
+/* SYSCFG memory remap register */
+#define SYSCFG_MEMRMP_MEM_BOOT BIT(0)
+#define SYSCFG_MEMRMP_SWP_FMC  BIT(10)
+
+/* SYSCFG peripheral mode configuration register */
+#define SYSCFG_PMC_ADCXDC2     BIT(16)
+#define SYSCFG_PMC_MII_RMII_SEL        BIT(23)
+
+/* Compensation cell control register */
+#define SYSCFG_CMPCR_CMP_PD    BIT(0)
+#define SYSCFG_CMPCR_READY     BIT(8)
+
+#endif

diff --git a/arch/arm/mach-stm32/stm32f7/clock.c b/arch/arm/mach-stm32/stm32f7/clock.c
index 4faf1747a8a2fde7ad456c9a442620aed0d601a6..8b3d3fd73abc30c543840c5777a7ff47ffb40adb 100644 (file)
--- a/arch/arm/mach-stm32/stm32f7/clock.c
+++ b/arch/arm/mach-stm32/stm32f7/clock.c
@@ -261,6 +261,11 @@ void clock_setup(int peripheral)
        case FMC_CLOCK_CFG:
                setbits_le32(&STM32_RCC->ahb3enr, RCC_AHB3ENR_FMC_EN);
                break;
+       case STMMAC_CLOCK_CFG:
+               setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_EN);
+               setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_RX_EN);
+               setbits_le32(&STM32_RCC->ahb1enr, RCC_AHB1ENR_ETHMAC_TX_EN);
+               break;
        default:
                break;
        }

diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 929ccb42e0627cd959ad38028b6cdb936ddc1340..6c1613880a65dfb33a4c6aceb80b6de2d68b12c8 100644 (file)
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -15,6 +15,7 @@
 #include <dm/platform_data/serial_stm32x7.h>
 #include <asm/arch/stm32_periph.h>
 #include <asm/arch/stm32_defs.h>
+#include <asm/arch/syscfg.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -276,6 +277,55 @@ U_BOOT_DEVICE(stm32x7_serials) = {
        .platdata = &serial_platdata,
 };
 
+#ifdef CONFIG_ETH_DESIGNWARE
+const struct stm32_gpio_ctl gpio_ctl_eth = {
+       .mode = STM32_GPIO_MODE_AF,
+       .otype = STM32_GPIO_OTYPE_PP,
+       .speed = STM32_GPIO_SPEED_100M,
+       .pupd = STM32_GPIO_PUPD_NO,
+       .af = STM32_GPIO_AF11
+};
+
+static const struct stm32_gpio_dsc eth_gpio[] = {
+       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_1},  /* ETH_RMII_REF_CLK */
+       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_2},  /* ETH_MDIO */
+       {STM32_GPIO_PORT_A, STM32_GPIO_PIN_7},  /* ETH_RMII_CRS_DV */
+
+       {STM32_GPIO_PORT_C, STM32_GPIO_PIN_1},  /* ETH_MDC */
+       {STM32_GPIO_PORT_C, STM32_GPIO_PIN_4},  /* ETH_RMII_RXD0 */
+       {STM32_GPIO_PORT_C, STM32_GPIO_PIN_5},  /* ETH_RMII_RXD1 */
+
+       {STM32_GPIO_PORT_G, STM32_GPIO_PIN_11}, /* ETH_RMII_TX_EN */
+       {STM32_GPIO_PORT_G, STM32_GPIO_PIN_13}, /* ETH_RMII_TXD0 */
+       {STM32_GPIO_PORT_G, STM32_GPIO_PIN_14}, /* ETH_RMII_TXD1 */
+};
+
+static int stmmac_setup(void)
+{
+       int res = 0;
+       int i;
+
+       clock_setup(SYSCFG_CLOCK_CFG);
+
+       /* Set >RMII mode */
+       STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
+
+       clock_setup(GPIO_A_CLOCK_CFG);
+       clock_setup(GPIO_C_CLOCK_CFG);
+       clock_setup(GPIO_G_CLOCK_CFG);
+
+       for (i = 0; i < ARRAY_SIZE(eth_gpio); i++) {
+               res = stm32_gpio_config(&eth_gpio[i], &gpio_ctl_eth);
+               if (res)
+                       return res;
+       }
+
+       clock_setup(STMMAC_CLOCK_CFG);
+
+       return 0;
+}
+#endif
+
 u32 get_board_rev(void)
 {
        return 0;
@@ -290,6 +340,12 @@ int board_early_init_f(void)
        if (res)
                return res;
 
+#ifdef CONFIG_ETH_DESIGNWARE
+       res = stmmac_setup();
+       if (res)
+               return res;
+#endif
+
        return 0;
 }
 

diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index 0499f1ed0409b02015b1a77cf9845d5fc23b482b..38caeca03e746b9b443735f9a024d799183a5e97 100644 (file)
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -14,7 +14,20 @@ CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
 CONFIG_AUTOBOOT_STOP_STR=" "
 # CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
 CONFIG_CMD_TIMER=y
-CONFIG_OF_LIBFDT=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index f242fc6b3faddce198930d7a0b738271b8c30edb..e207bc63b837fbc60db485642f49613bd8f6b1f9 100644 (file)
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -763,6 +763,7 @@ static const struct udevice_id designware_eth_ids[] = {
        { .compatible = "allwinner,sun7i-a20-gmac" },
        { .compatible = "altr,socfpga-stmmac" },
        { .compatible = "amlogic,meson6-dwmac" },
+       { .compatible = "st,stm32-dwmac" },
        { }
 };
 

diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index b4a8f41014854758adcd9648fed0368334a27f45..735ade6b9eedd5783cae0a14e9e9d798ff439cea 100644 (file)
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -40,6 +40,11 @@
 #define CONFIG_STM32_FLASH
 #define CONFIG_STM32X7_SERIAL
 
+#define CONFIG_DESIGNWARE_ETH
+#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
+#define CONFIG_DW_ALTDESCRIPTOR
+#define CONFIG_MII
+
 #define CONFIG_STM32_HSE_HZ            25000000
 #define CONFIG_SYS_CLK_FREQ            200000000 /* 200 MHz */
 #define CONFIG_SYS_HZ_CLOCK            1000000 /* Timer is clocked at 1MHz */
@@ -54,8 +59,8 @@
                                        + sizeof(CONFIG_SYS_PROMPT) + 16)
 
 #define CONFIG_SYS_MAXARGS             16
-#define CONFIG_SYS_MALLOC_LEN          (16 * 1024)
-#define CONFIG_STACKSIZE               (64 << 10)
+#define CONFIG_SYS_MALLOC_LEN          (1 * 1024 * 1024)
+#define CONFIG_STACKSIZE               (256 * 1024)
 
 #define CONFIG_BAUDRATE                        115200
 #define CONFIG_BOOTARGS                                                        \