Commit
62649165cb02 ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
fixed cache alignment for systems with a D-CACHE.
However it introduced some performance regressions [1] on system
flashing huge images, such as Android.
On AM62x SK EVM, we also observe such performance penalty:
Sending sparse 'super' 1/2 (768793 KB) OKAY [ 23.954s]
Writing 'super' OKAY [ 75.926s]
Sending sparse 'super' 2/2 (629819 KB) OKAY [ 19.641s]
Writing 'super' OKAY [ 62.849s]
Finished. Total time: 182.474s
The reason for this is that we use an arbitrary small buffer
(info->blksz * 100) for transferring.
Fix it by using a bigger buffer (info->blksz * FASTBOOT_MAX_BLK_WRITE)
as suggested in the original's patch review [2].
With this patch, performance impact is mitigated:
Sending sparse 'super' 1/2 (768793 KB) OKAY [ 23.912s]
Writing 'super' OKAY [ 15.780s]
Sending sparse 'super' 2/2 (629819 KB) OKAY [ 19.581s]
Writing 'super' OKAY [ 17.192s]
Finished. Total time: 76.569s
[1] https://lore.kernel.org/r/
20221118121323.
4009193-1-gary.bisson@boundarydevices.com
[2] https://lore.kernel.org/r/all/
43e4c17c-4483-ec8e-f843-
9b4c5569bd18@seco.com/
Fixes: 62649165cb02 ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
#include <linux/compat.h>
#include <android_image.h>
-#define FASTBOOT_MAX_BLK_WRITE 16384
-
#define BOOT_PARTITION_NAME "boot"
struct fb_mmc_sparse {
#include <part.h>
#include <sparse_format.h>
+#define FASTBOOT_MAX_BLK_WRITE 16384
+
#define ROUNDUP(x, y) (((x) + ((y) - 1)) & ~((y) - 1))
struct sparse_storage {
void *data,
char *response)
{
- lbaint_t n = blkcnt, write_blks, blks = 0, aligned_buf_blks = 100;
+ lbaint_t n = blkcnt, write_blks, blks = 0;
+ lbaint_t aligned_buf_blks = FASTBOOT_MAX_BLK_WRITE;
uint32_t *aligned_buf = NULL;
if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) {