board: tbs2910: Add device tree

... as preparation for additional driver model coonversions.

We use CONFIG_OF_EMBED here to keep u-boot.imx as final binary name. So we
maintain compatibility with the original TBS u-boot and available HOWTOs
for u-boot updates.

Signed-off-by: Soeren Moch <smoch@web.de>

diff --git a/arch/arm/dts/imx6q-tbs2910.dts b/arch/arm/dts/imx6q-tbs2910.dts
new file mode 100644 (file)
index 0000000..21e62c0
--- /dev/null
+++ b/arch/arm/dts/imx6q-tbs2910.dts
@@ -0,0 +1,394 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Copyright 2014-2019 Soeren Moch <smoch@web.de>
+
+/dts-v1/;
+
+#include "imx6q.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "TBS2910 Matrix ARM mini PC";
+       compatible = "tbs,imx6q-tbs2910", "fsl,imx6q";
+
+       chosen {
+               stdout-path = &uart1;
+       };
+
+       aliases {
+               mmc0 = &usdhc2;
+               mmc1 = &usdhc3;
+               mmc2 = &usdhc4;
+               usb0 = &usbotg;
+       };
+
+       memory@10000000 {
+               reg = <0x10000000 0x80000000>;
+       };
+
+       fan {
+               compatible = "gpio-fan";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_fan>;
+               gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
+               gpio-fan,speed-map = <0    0
+                                     3000 1>;
+       };
+
+       ir_recv {
+               compatible = "gpio-ir-receiver";
+               gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ir>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               blue {
+                       label = "blue_status_led";
+                       gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+                       default-state = "keep";
+               };
+       };
+
+       reg_2p5v: regulator-2p5v {
+               compatible = "regulator-fixed";
+               regulator-name = "2P5V";
+               regulator-min-microvolt = <2500000>;
+               regulator-max-microvolt = <2500000>;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+       };
+
+       reg_5p0v: regulator-5p0v {
+               compatible = "regulator-fixed";
+               regulator-name = "5P0V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       sound-sgtl5000 {
+               audio-codec = <&sgtl5000>;
+               audio-routing =
+                       "MIC_IN", "Mic Jack",
+                       "Mic Jack", "Mic Bias",
+                       "Headphone Jack", "HP_OUT";
+               compatible = "fsl,imx-audio-sgtl5000";
+               model = "On-board Codec";
+               mux-ext-port = <3>;
+               mux-int-port = <1>;
+               ssi-controller = <&ssi1>;
+       };
+
+       sound-spdif {
+               compatible = "fsl,imx-audio-spdif";
+               model = "On-board SPDIF";
+               spdif-controller = <&spdif>;
+               spdif-out;
+       };
+};
+
+&audmux {
+       status = "okay";
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+       phy-mode = "rgmii";
+       phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&hdmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hdmi>;
+       ddc-i2c-bus = <&i2c2>;
+       status = "okay";
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       sgtl5000: sgtl5000@a {
+               clocks = <&clks IMX6QDL_CLK_CKO>;
+               compatible = "fsl,sgtl5000";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_sgtl5000>;
+               reg = <0x0a>;
+               VDDA-supply = <&reg_2p5v>;
+               VDDIO-supply = <&reg_3p3v>;
+       };
+};
+
+&i2c2 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
+&i2c3 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "okay";
+
+       rtc: ds1307@68 {
+               compatible = "dallas,ds1307";
+               reg = <0x68>;
+       };
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pcie>;
+       reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&sata {
+       fsl,transmit-level-mV = <1104>;
+       fsl,transmit-boost-mdB = <3330>;
+       fsl,transmit-atten-16ths = <16>;
+       fsl,receive-eq-mdB = <3000>;
+       status = "okay";
+};
+
+&snvs_poweroff {
+       status = "okay";
+};
+
+&spdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spdif>;
+       status = "okay";
+};
+
+&ssi1 {
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&usbh1 {
+       vbus-supply = <&reg_5p0v>;
+       status = "okay";
+};
+
+&usbotg {
+       vbus-supply = <&reg_5p0v>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg>;
+       disable-over-current;
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       bus-width = <4>;
+       cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_3p3v>;
+       voltage-ranges = <3300 3300>;
+       no-1-8-v;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       bus-width = <4>;
+       cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_3p3v>;
+       voltage-ranges = <3300 3300>;
+       no-1-8-v;
+       status = "okay";
+};
+
+&usdhc4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc4>;
+       bus-width = <8>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_3p3v>;
+       voltage-ranges = <3300 3300>;
+       non-removable;
+       no-1-8-v;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_enet: enetgrp {
+               fsl,pins = <
+                       MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
+                       MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
+                       MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
+                       MX6QDL_PAD_GPIO_16__ENET_REF_CLK      0x4001b0a8
+                       MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25    0x1b059
+               >;
+       };
+
+       pinctrl_gpio_fan: gpiofangrp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D28__GPIO3_IO28        0x130b1
+               >;
+       };
+
+       pinctrl_gpio_leds: gpioledsgrp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_2__GPIO1_IO02         0x130b1
+               >;
+       };
+
+       pinctrl_hdmi: hdmigrp {
+               fsl,pins = <
+                       MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_CSI0_DAT9__I2C1_SCL        0x4001b8b1
+                       MX6QDL_PAD_CSI0_DAT8__I2C1_SDA        0x4001b8b1
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_KEY_COL3__I2C2_SCL         0x4001b8b1
+                       MX6QDL_PAD_KEY_ROW3__I2C2_SDA         0x4001b8b1
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_3__I2C3_SCL           0x4001b8b1
+                       MX6QDL_PAD_GPIO_6__I2C3_SDA           0x4001b8b1
+               >;
+       };
+
+       pinctrl_ir: irgrp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D18__GPIO3_IO18        0x17059
+               >;
+       };
+
+       pinctrl_pcie: pciegrp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_17__GPIO7_IO12        0x17059
+               >;
+       };
+
+       pinctrl_sgtl5000: sgtl5000grp {
+               fsl,pins = <
+                       MX6QDL_PAD_CSI0_DAT7__AUD3_RXD        0x130b0
+                       MX6QDL_PAD_CSI0_DAT4__AUD3_TXC        0x130b0
+                       MX6QDL_PAD_CSI0_DAT5__AUD3_TXD        0x110b0
+                       MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS       0x130b0
+                       MX6QDL_PAD_GPIO_0__CCM_CLKO1          0x130b0
+               >;
+       };
+
+       pinctrl_spdif: spdifgrp {
+               fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT     0x13091
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA  0x1b0b1
+                       MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA  0x1b0b1
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D26__UART2_TX_DATA     0x1b0b1
+                       MX6QDL_PAD_EIM_D27__UART2_RX_DATA     0x1b0b1
+               >;
+       };
+
+       pinctrl_usbotg: usbotggrp {
+               fsl,pins = <
+                       MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID     0x17059
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD2_CMD__SD2_CMD           0x17059
+                       MX6QDL_PAD_SD2_CLK__SD2_CLK           0x10059
+                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0        0x17059
+                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1        0x17059
+                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2        0x17059
+                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3        0x17059
+                       MX6QDL_PAD_NANDF_D2__GPIO2_IO02       0x17059
+               >;
+       };
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_CMD__SD3_CMD           0x17059
+                       MX6QDL_PAD_SD3_CLK__SD3_CLK           0x10059
+                       MX6QDL_PAD_SD3_DAT0__SD3_DATA0        0x17059
+                       MX6QDL_PAD_SD3_DAT1__SD3_DATA1        0x17059
+                       MX6QDL_PAD_SD3_DAT2__SD3_DATA2        0x17059
+                       MX6QDL_PAD_SD3_DAT3__SD3_DATA3        0x17059
+                       MX6QDL_PAD_NANDF_D0__GPIO2_IO00       0x17059
+                       MX6QDL_PAD_NANDF_D1__GPIO2_IO01       0x17059
+               >;
+       };
+
+       pinctrl_usdhc4: usdhc4grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD4_CMD__SD4_CMD           0x17059
+                       MX6QDL_PAD_SD4_CLK__SD4_CLK           0x10059
+                       MX6QDL_PAD_SD4_DAT0__SD4_DATA0        0x17059
+                       MX6QDL_PAD_SD4_DAT1__SD4_DATA1        0x17059
+                       MX6QDL_PAD_SD4_DAT2__SD4_DATA2        0x17059
+                       MX6QDL_PAD_SD4_DAT3__SD4_DATA3        0x17059
+                       MX6QDL_PAD_SD4_DAT4__SD4_DATA4        0x17059
+                       MX6QDL_PAD_SD4_DAT5__SD4_DATA5        0x17059
+                       MX6QDL_PAD_SD4_DAT6__SD4_DATA6        0x17059
+                       MX6QDL_PAD_SD4_DAT7__SD4_DATA7        0x17059
+               >;
+       };
+};

diff --git a/board/tbs/tbs2910/MAINTAINERS b/board/tbs/tbs2910/MAINTAINERS
index bf176553d2433ed088eb990808724303febbb809..a3ad2f712a254b26dab7e51b2f88cc4e89daedfa 100644 (file)
--- a/board/tbs/tbs2910/MAINTAINERS
+++ b/board/tbs/tbs2910/MAINTAINERS
@@ -1,6 +1,7 @@
 TBS2910 BOARD
 M:     Soeren Moch <smoch@web.de>
 S:     Maintained
+F:     arch/arm/dts/imx6q-tbs2910.dts
 F:     board/tbs/tbs2910/
 F:     configs/tbs2910_defconfig
 F:     include/configs/tbs2910.h

diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c
index ecb45f208d0c2a72be0468c01830525b9962aa69..99b282ca6b4957f46092c29dcd38503425809eaa 100644 (file)
--- a/board/tbs/tbs2910/tbs2910.c
+++ b/board/tbs/tbs2910/tbs2910.c
@@ -446,9 +446,3 @@ int board_init(void)
 #endif
        return 0;
 }
-
-int checkboard(void)
-{
-       puts("Board: TBS2910 Matrix ARM mini PC\n");
-       return 0;
-}

diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 70a3e18e23c9f2fbb927ddc86c796e582953053f..3cc68eb9220f28245b70e42ea6266558a0977de5 100644 (file)
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -36,6 +36,9 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_DWC_AHSATA=y
@@ -55,5 +58,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_VIDEO=y
-CONFIG_OF_LIBFDT=y
 # CONFIG_EFI_LOADER is not set