driver/net/fm/memac_phy: set NEG bit for external MDIOs

NEG bit default is '1' for external MDIOs as per FMAN-v3 RM, but on some
platforms, e.g. T2080QDS, this bit is '0', which leads to MDIO failure
on XAUI PHY, so set this bit definitely to align with the RM.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/include/asm/fsl_memac.h b/arch/powerpc/include/asm/fsl_memac.h
index f84c1a915b3dea1586301849499c95068c3dad11..bed2a40bb274efdd24740209f4fa2fdb1d1db803 100644 (file)
--- a/arch/powerpc/include/asm/fsl_memac.h
+++ b/arch/powerpc/include/asm/fsl_memac.h
@@ -244,6 +244,7 @@ struct memac_mdio_controller {
 #define MDIO_STAT_PRE          (1 << 5)
 #define MDIO_STAT_ENC          (1 << 6)
 #define MDIO_STAT_HOLD_15_CLK  (7 << 2)
+#define MDIO_STAT_NEG          (1 << 23)
 
 #define MDIO_CTL_DEV_ADDR(x)   (x & 0x1f)
 #define MDIO_CTL_PORT_ADDR(x)  ((x & 0x1f) << 5)

diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index e432ae77583500a5a97ba7965079af1d6d036d1c..a155d8930b38761969b7dff7c12f7b1376193eea 100644 (file)
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -139,9 +139,12 @@ int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info)
         * is zero, so MDIO clock is disabled.
         * So, for proper functioning of MDIO, MDIO_CLK_DIV bits needs to
         * be properly initialized.
+        * NEG bit default should be '1' as per FMAN-v3 RM, but on platform
+        * like T2080QDS, this bit default is '0', which leads to MDIO failure
+        * on XAUI PHY, so set this bit definitely.
         */
        setbits_be32(&((struct memac_mdio_controller *)info->regs)->mdio_stat,
-                    MDIO_STAT_CLKDIV(258));
+                    MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG);
 
        return mdio_register(bus);
 }