arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA

The new board version has the 2nd FPGA connected via CS# 0 instead of
2 on SPI bus 1. Change this setup in the DT accordingly. Please note
that this change does still work on the old board version because the
CS signal is not used on this board.

Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts
index 065e4434175a33e03e5c988d80eafc0eb0c99fa6..965c38426c50c197e6f87eaa98bff8cef855ea78 100644 (file)
--- a/arch/arm/dts/armada-xp-theadorable.dts
+++ b/arch/arm/dts/armada-xp-theadorable.dts
@@ -151,11 +151,11 @@
                        spi1: spi@10680 {
                                status = "okay";
 
-                               fpga@2 {
+                               fpga@0 {
                                        #address-cells = <1>;
                                        #size-cells = <1>;
                                        compatible = "spi-generic-device";
-                                       reg = <2>; /* Chip select 2 */
+                                       reg = <0>; /* Chip select 0 */
                                        spi-max-frequency = <27777777>;
                                };
                        };