]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig
authorTom Rini <trini@konsulko.com>
Sat, 29 Oct 2022 00:27:04 +0000 (20:27 -0400)
committerTom Rini <trini@konsulko.com>
Thu, 10 Nov 2022 15:08:54 +0000 (10:08 -0500)
This converts the following to Kconfig:
   CONFIG_SYS_MAX_NAND_DEVICE

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
116 files changed:
configs/CHIP_pro_defconfig
configs/Nintendo_NES_Classic_Edition_defconfig
configs/etamin_defconfig
doc/README.nand
drivers/mtd/nand/raw/Kconfig
include/configs/M5329EVB.h
include/configs/M5373EVB.h
include/configs/MCR3000.h
include/configs/P1010RDB.h
include/configs/P2041RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h
include/configs/at91sam9m10g45ek.h
include/configs/at91sam9n12ek.h
include/configs/at91sam9rlek.h
include/configs/at91sam9x5ek.h
include/configs/bcm963158.h
include/configs/bcm96855.h
include/configs/bcm96856.h
include/configs/bcm96858.h
include/configs/bk4r1.h
include/configs/broadcom_bcm968380gerg.h
include/configs/cm_fx6.h
include/configs/colibri-imx6ull.h
include/configs/colibri_imx7.h
include/configs/colibri_t20.h
include/configs/colibri_vf.h
include/configs/comtrend_vr3032u.h
include/configs/corvus.h
include/configs/da850evm.h
include/configs/devkit3250.h
include/configs/etamin.h
include/configs/ethernut5.h
include/configs/gardena-smart-gateway-at91sam.h
include/configs/gw_ventana.h
include/configs/harmony.h
include/configs/imx27lite-common.h
include/configs/imx6-engicam.h
include/configs/imx6_logic.h
include/configs/imx6ulz_smm_m2.h
include/configs/imx8mn_bsh_smm_s2.h
include/configs/imx8mp_rsb3720.h
include/configs/km/km-mpc83xx.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/kmcent2.h
include/configs/kmcoge5ne.h
include/configs/ls1021aqds.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046afrwy.h
include/configs/ls1046aqds.h
include/configs/ls1046ardb.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h
include/configs/m53menlo.h
include/configs/medcom-wide.h
include/configs/meesc.h
include/configs/mt7621.h
include/configs/mv-common.h
include/configs/mvebu_armada-8k.h
include/configs/mx6sabreauto.h
include/configs/mx6sxsabreauto.h
include/configs/mx7dsabresd.h
include/configs/mxs.h
include/configs/mys_6ulx.h
include/configs/npi_imx6ull.h
include/configs/octeontx_common.h
include/configs/omap3_beagle.h
include/configs/omap3_evm.h
include/configs/omap3_logic.h
include/configs/omapl138_lcdk.h
include/configs/p1_p2_rdb_pc.h
include/configs/pcl063.h
include/configs/pcl063_ull.h
include/configs/pcm052.h
include/configs/pcm058.h
include/configs/plutux.h
include/configs/pm9261.h
include/configs/pm9263.h
include/configs/pm9g45.h
include/configs/presidio_asic.h
include/configs/sam9x60ek.h
include/configs/sama5d2_ptc_ek.h
include/configs/sama5d3_xplained.h
include/configs/sama5d3xek.h
include/configs/sama5d4_xplained.h
include/configs/sama5d4ek.h
include/configs/seaboard.h
include/configs/siemens-am33x-common.h
include/configs/smartweb.h
include/configs/snapper9g45.h
include/configs/socfpga_common.h
include/configs/socrates.h
include/configs/stm32mp13_common.h
include/configs/stm32mp15_common.h
include/configs/sunxi-common.h
include/configs/taurus.h
include/configs/tec.h
include/configs/ti816x_evm.h
include/configs/ti_armv7_keystone2.h
include/configs/ti_armv7_omap.h
include/configs/uniphier.h
include/configs/usb_a9263.h
include/configs/vf610twr.h
include/configs/work_92105.h
include/configs/x530.h
include/configs/xilinx_zynqmp.h
include/configs/zynq-common.h

index 29179601907ad4ef4b5e70f8c83454309b3e8a00..5a12fbb8cdaad318fd3fb2adc3fb704761fd704d 100644 (file)
@@ -19,6 +19,7 @@ CONFIG_SYS_I2C_SPEED=400000
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
 CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
 CONFIG_SYS_NAND_ONFI_DETECTION=y
 CONFIG_SYS_NAND_PAGE_SIZE=0x1000
index b66023418aec43cb6defb2b182d55ca5d30143e5..89fb441cc73888af1eddaa2ef57e007bc5e98b0b 100644 (file)
@@ -14,6 +14,7 @@ CONFIG_CMD_MTDPARTS=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=8
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 CONFIG_SYS_NAND_ONFI_DETECTION=y
 CONFIG_SYS_NAND_PAGE_SIZE=0x800
index 7bc3ac2a659c27229480230caaaa157c4452cff8..ee731f3c0a1b3f08e801ce17fb93ecc35b7cd085 100644 (file)
@@ -98,6 +98,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_SYS_MAX_NAND_DEVICE=3
 CONFIG_NAND_OMAP_ECCSCHEME_BCH16_CODE_HW=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 CONFIG_SYS_NAND_ONFI_DETECTION=y
index ffcea9079990008350b452f3921fd7ad1139eb5b..d1ce30768b92d976ff51abba36c9842b128c73c0 100644 (file)
@@ -99,9 +99,6 @@ Configuration Options:
    CONFIG_CMD_NAND_TORTURE
       Enables the torture command (see description of this command below).
 
-   CONFIG_SYS_MAX_NAND_DEVICE
-      The maximum number of NAND devices you want to support.
-
    CONFIG_SYS_NAND_MAX_ECCPOS
       If specified, overrides the maximum number of ECC bytes
       supported.  Useful for reducing image size, especially with SPL.
index d6e3eeb3c093a0779546bea011888bbd7c3dfbcb..a7196d51d9017314980cca994c3500b0ddf30655 100644 (file)
@@ -26,6 +26,10 @@ config TPL_SYS_NAND_SELF_INIT
 config TPL_NAND_INIT
        bool
 
+config SYS_MAX_NAND_DEVICE
+       int "Maximum number of NAND devices to support"
+       default 1
+
 config SYS_NAND_DRIVER_ECC_LAYOUT
        bool "Omit standard ECC layouts to save space"
        help
index a6c953f1a46cf770f828c94951628ac6b160db47..474480cc1c2473c1c640ddd7080d31cd42d29971 100644 (file)
@@ -95,7 +95,6 @@
 #endif
 
 #ifdef CONFIG_CMD_NAND
-#      define CONFIG_SYS_MAX_NAND_DEVICE       1
 #      define CONFIG_SYS_NAND_BASE             CONFIG_SYS_CS2_BASE
 #      define CONFIG_SYS_NAND_SIZE             1
 #      define CONFIG_SYS_NAND_BASE_LIST        { CONFIG_SYS_NAND_BASE }
index f519bef24744a337c16d99765ed616423447e95d..2e1c8579e909502d7316f410a7f2f657ded3f3c4 100644 (file)
@@ -96,7 +96,6 @@
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
 #endif
 
-#      define CONFIG_SYS_MAX_NAND_DEVICE       1
 #      define CONFIG_SYS_NAND_BASE             CONFIG_SYS_CS2_BASE
 #      define CONFIG_SYS_NAND_SIZE             1
 #      define CONFIG_SYS_NAND_BASE_LIST        { CONFIG_SYS_NAND_BASE }
index 1c467025ef6d664298ad30743b55968b969f96e7..371ae20eee5afe5bd35e2cba1ca37f18ce66791f 100644 (file)
@@ -83,7 +83,6 @@
 /* Ethernet configuration part */
 
 /* NAND configuration part */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x0C000000
 
 #endif /* __CONFIG_H */
index b87118c1ed2665f858707a25879c0fbb0166776a..88d9bec9d927b706b0f59031fb1c1ebfc23867f5 100644 (file)
@@ -202,7 +202,6 @@ extern unsigned long get_sdram_size(void);
 #endif
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #if defined(CONFIG_TARGET_P1010RDB_PA)
 /* NAND Flash Timing Params */
index 60b0963648ca77c6ebf842a5b9a69a62b7b8cc6c..317784e1cfd5d35d82ceafdcbbe8f0c325004090 100644 (file)
 #endif
 
 #define CONFIG_SYS_NAND_BASE_LIST     {CONFIG_SYS_NAND_BASE}
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* NAND flash config */
 #define CONFIG_SYS_NAND_BR_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
index f6a911cc17756e984e2c05bcceee3e4e258e47ea..88700cb877bb9a8015d59cf81c4abeacdd14de5f 100644 (file)
 
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
index d9ee8736adcc1075dc70360a74aefaed01f3b21c..6474b6f21bd7d72ddaae13249ce48ad554d8d473 100644 (file)
 
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
index 6701eab1155fa458cc8f4fa39ab22be6c745e897..10126a876e5b2f084356505771d4994e6f89c1a0 100644 (file)
 
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
index 86c92de50e9aed53ccfc522793ec3ccb68d06c1e..a74225b61e6570fe951084adb4a276ab11d3a843 100644 (file)
 
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
index 1ad82238b279576d780e7306cdbca9a436db8d91..42d1095be873e4896e804a10f3f074d9691327dc 100644 (file)
 
 #define CONFIG_SYS_NAND_DDR_LAW                11
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NAND_CSPR_EXT
index ca5815fe36ba6468e2fa36d3042591976c7cba09..d51da9d506788311985182e14d4be87efc37f54d 100644 (file)
@@ -43,7 +43,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index 5576a5ffbe4bf3705e97a3ab387206ba00b35fcf..5dc8f21a85355971841fdc067d984c5234dcf350 100644 (file)
@@ -24,7 +24,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD22 */
index fb65880f32e6194d5fb9bacda838d1b38977c150..3406373112b1181d1cd42b4b630533be80482394 100644 (file)
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD21 */
index 2d257c49831d1bac8a1ef886a270205249bc0128..9a6f80f278db80108dda43584fadf4bcea429e83 100644 (file)
@@ -20,7 +20,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
index f2ca4f3d0ba6a80930e4f6cd147a69dd0badde7e..862179bd9e76d54f635876c84fc46d328a995f3a 100644 (file)
@@ -21,7 +21,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
index bc687fc44d88a4d16aa88450829fa02489b1a0b0..c60c248b747ecd6433f692e81f7a9fc2cf7a1c6e 100644 (file)
@@ -25,7 +25,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD21 */
index 0e7665843dba5189a14e2b87bf24b0e9f12d18d6..71246ce0e2bc38edc8edffb73be84f6453a36c72 100644 (file)
@@ -27,7 +27,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
index f47396335868a1f85fa497507a7121f84b186b59..b15c4111c9671b0dc296f6112b1cfa1f2992ce70 100644 (file)
@@ -8,8 +8,4 @@
 
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif /* CONFIG_MTD_RAW_NAND */
-
 #endif
index ba2d8a317d2554168a694e592d5df5b33bf6d42d..6e420f2c66fb1817d6e2a11920f7cf7186f1f6e2 100644 (file)
@@ -8,8 +8,4 @@
 
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif /* CONFIG_MTD_RAW_NAND */
-
 #endif
index 3050cf337229a935c982f467a3187ad0040e3280..a7ae71eeaafe038d2d5f63e37cc44c777c831c42 100644 (file)
@@ -8,8 +8,4 @@
 
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif /* CONFIG_MTD_RAW_NAND */
-
 #endif
index 8bd1169207f0653017596bbe934b6c94e9ec60a5..4e584b41fb37535c089f598c70692893f6b948c4 100644 (file)
@@ -8,8 +8,4 @@
 
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif /* CONFIG_MTD_RAW_NAND */
-
 #endif
index b3e1fddc02fc88184cdea622c4ec9284fd511e8a..ca2bc1907e39b077132554dd43a4873f0a297aa2 100644 (file)
@@ -51,7 +51,6 @@
 #include <linux/sizes.h>
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
 
 #define IMX_FEC1_BASE                  ENET1_BASE_ADDR
 
index c1c1b37fabd97d45ac7e8da1acfbc65059c458bc..bad143981a70d1c840d4e25ad6f9982496d386a6 100644 (file)
@@ -6,6 +6,3 @@
 #include <configs/bmips_common.h>
 #include <configs/bmips_bcm6838.h>
 
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif /* CONFIG_MTD_RAW_NAND */
index cbba7264400264914f43a5239aa261058d865351..e5e8c13090a8cb86855e4055b681b0b3ccce52bf 100644 (file)
 
 /* NAND */
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 /* APBH DMA is required for NAND support */
 
 /* Ethernet */
index 321edabe98427f7e0d7327ea47821246ca4f73a3..31426b65ad5db794c49425437e0b7e9ccac87b7c 100644 (file)
 
 #ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 /* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
 #define CONFIG_SYS_NAND_BASE           -1
 #endif
index b8d0dc959a736ec40aa915feb7d4ff8933ac3f03..c95b732f8dccc4082093501838f72392c543859f 100644 (file)
 
 #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES
 #endif
index 73d18444215a2c969690012094cfbfc63e826a55..b758086b86d5718efc03e8baa456bb24cb92d1f2 100644 (file)
@@ -16,7 +16,6 @@
 #define CONFIG_SYS_NS16550_COM1                NV_PA_APB_UARTA_BASE
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #define UBOOT_UPDATE \
        "update_uboot=nand erase.part u-boot && " \
index 268afbb7fa389cfa2c36cdffc8c388087dda7dfa..0f6f99d244f91c2df60eb61ff83a6af3f31e4caa 100644 (file)
@@ -15,7 +15,6 @@
 #include <linux/sizes.h>
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #define CONFIG_IPADDR          192.168.10.2
 #define CONFIG_NETMASK         255.255.255.0
index a46b3946bf53d76f25aaf35b32ab2c83736c5958..e8b0724988ff04bb9e633cf8dc6210eb4194d516 100644 (file)
@@ -6,6 +6,3 @@
 #include <configs/bmips_common.h>
 #include <configs/bmips_bcm63268.h>
 
-#ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif /* CONFIG_MTD_RAW_NAND */
index 5e43c21774904eb0fac20379abb2cdca908f0379..0596afbf9fa2f1e038fba4d7693d5ea86e632f89 100644 (file)
@@ -37,7 +37,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
index 58c902431d133d9f5c27cb6b707a816a80590b70..3625f923a5c14c5c2c5307209b3a52815f697c65 100644 (file)
 #define CONFIG_SYS_NAND_MASK_CLE               0x10
 #define CONFIG_SYS_NAND_MASK_ALE               0x8
 #undef CONFIG_SYS_NAND_HW_ECC
-#define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x40000
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xc1080000
index 66fb25bc029972172cda9a332a05195782797b85..e5639fb24bfd2025c682d8d19eda8c32fcd285d6 100644 (file)
@@ -36,7 +36,6 @@
  * NAND controller
  */
 #define CONFIG_SYS_NAND_BASE           SLC_NAND_BASE
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 /*
index 7923fbb599d1a0e76c79d7eda6681efac7b60e66..75322a37322c1a497b874a85dcf073a833cc8c12 100644 (file)
@@ -45,8 +45,6 @@
 #define CONFIG_SYS_NAND_ECCSIZE 512
 #define CONFIG_SYS_NAND_ECCBYTES 26
 
-#undef CONFIG_SYS_MAX_NAND_DEVICE
-#define CONFIG_SYS_MAX_NAND_DEVICE      3
 #define CONFIG_SYS_NAND_BASE2           (0x18000000)    /* physical address */
 #define CONFIG_SYS_NAND_BASE_LIST       {CONFIG_SYS_NAND_BASE, \
                                        CONFIG_SYS_NAND_BASE2}
index 7a3c800dca9c1150bc35f666c3f7ca9515b212c2..22647abee0d3f5a74f2d7e1eed27bcaaaa4482a2 100644 (file)
@@ -37,7 +37,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
index 635d0f01b2342c3e9ec3b43f0f63fd0d2f2cd23d..a091ec5d4ec9b4a24abcf370a62400ad224c1f77 100644 (file)
@@ -22,7 +22,6 @@
 #define CONFIG_SYS_SDRAM_SIZE          0x08000000      /* 128 megs */
 
 /* NAND flash */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
index bba64af2c912427b90b43b46997a68b32d7bed37..714f8d88affe9eb37bde23da63ac47a14669449d 100644 (file)
@@ -20,7 +20,6 @@
 #define CONFIG_MXC_UART_BASE          UART2_BASE
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
index 879bd5c9539ae25cf0abdac9234f75ef98c561ca..fe4b02c0ce2cd7225b26b632dbca5b1931902895 100644 (file)
@@ -24,7 +24,6 @@
 #endif
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Environment in NAND (which is 512M), aligned to start of last sector */
 
index 6ebdc3d6f976cf8625c3e79400c357b1e98786c9..40428452954aab33a3d2ac29cf9abab53bb87aab 100644 (file)
@@ -97,7 +97,6 @@
  * NAND
  */
 #define CONFIG_MXC_NAND_REGS_BASE      0xd8000000
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0xd8000000
 #define CONFIG_MXC_NAND_HWECC
 
index fa73cabda364a6cd4f241ba42ab41ae9c64049f2..f52367cc1a0a8ac7a0bc634cf112c6e93f44de88 100644 (file)
 
 /* NAND */
 #ifdef CONFIG_NAND_MXS
-# define CONFIG_SYS_MAX_NAND_DEVICE    1
 # define CONFIG_SYS_NAND_BASE          0x40000000
 # define CONFIG_SYS_NAND_U_BOOT_START  CONFIG_TEXT_BASE
 
index 9ab3f8abeff0457ca89ff845b2da98a3c0d6012b..a82641b68254830fb930e36d2e75a692508b63fc 100644 (file)
 /* Environment organization */
 
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_TEXT_BASE
 
index 50885c53b3bd8fdbe55390f34eb1d5e7a544b63e..46a96f1f828efa39f0a9f4073f7b3f6504bcaf6a 100644 (file)
@@ -71,7 +71,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #define CONFIG_SYS_NAND_BASE           0x20000000
 
index c6b296281424f22d690691b3144e39d0313f6e2b..a2323bd6716f2f2f3d2aaf8d15d276e452e128d3 100644 (file)
@@ -43,7 +43,6 @@
 #define PHYS_SDRAM_SIZE                        SZ_256M
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #define CONFIG_SYS_NAND_BASE           0x20000000
 
index ddc035ae22861ba6f02d1072af967e03df3ff664..8eb7456f94ed29b3b8a98f9daa36b47cd3b9d513 100644 (file)
 #ifdef CONFIG_NAND_MXS
 
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x20000000
 #endif /* CONFIG_NAND_MXS */
 
index 61c713459543efea36e27a55a7dd5fe518a68260..f05aeaca24fb3099e71588765a36ee58c239bfc3 100644 (file)
@@ -60,7 +60,6 @@
 
 #if defined(CONFIG_CMD_NAND)
 #define CONFIG_NAND_KMETER1
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           CONFIG_SYS_KMBEC_FPGA_BASE
 #endif
 
index 9565cea083e083537d73891e4a15c6cfe8800338..1f5a025017d5f7bf7ca02dbaf6c3a6d3252ff679 100644 (file)
 #define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NAND_FTIM3
 
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
 
 /* QRIO FPGA Definitions */
index e5cc62ebdc271414849cc919d66463a3a47e1ebc..6032f3913cc7cc538c548298bbafe4f08bbe0044 100644 (file)
 
 /* More NAND Flash Params */
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* QRIO on IFC CS2 */
 #define CONFIG_SYS_QRIO_BASE           0xfb000000
index b9d20c9c8eb9938ef379559b561f70958918708f..d6b60d8139a3712c864415391db3f0eb34dbfeac 100644 (file)
@@ -11,7 +11,6 @@
 #define CONFIG_HOSTNAME                "kmcoge5ne"
 #define CONFIG_NAND_ECC_BCH
 #define CONFIG_NAND_KMETER1
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define NAND_MAX_CHIPS                         1
 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */
 
index 37b8cd7e696d801a7aaed120a62c3535cb2a710f..a788c306b32fd6aa91f7f61f96d4a1f977c22b61 100644 (file)
 #define CONFIG_SYS_NAND_FTIM3           0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #endif
 
 /*
index 4158d15cc0fcd11a3cad2515b54ca1778e5b8d84..d207e475fc06fc46a04bf56ff8a1cedf6c3f870b 100644 (file)
 #define CONFIG_SYS_NAND_FTIM3           0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #endif
 
index 4bfe4e3ecd05843e1832072a8224efafe72f8bbb..206de7e1380c782d819be3a8add89886f0dfa61f 100644 (file)
@@ -82,7 +82,6 @@
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #ifdef CONFIG_NAND_BOOT
index 2df5f3f6c0bd21dd8f3a281c3eef9ad46140fef3..582b1ee93cd090fd9e646239b2756c27006bfd26 100644 (file)
@@ -45,7 +45,6 @@
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 /* IFC Timing Params */
index b411efd832d9b9e270bd91d66bb73cc22221672f..037d462b5dfc69642a71dca7104f041ee3c68229 100644 (file)
 #define CONFIG_SYS_NAND_FTIM3           0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 #endif
 
index 5d329577a631f80a74c303d74c8f3a4acdd53d7f..f5f16bae2d6089321beddb009bc0a985c7d145aa 100644 (file)
@@ -50,7 +50,6 @@
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 /*
index 2d3351e6b4fb1955384342eea35d3e3a4126b93f..d50b76b89ae556821b99f95ec569f29ff3024710 100644 (file)
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
index d98ed39812a71dca837ea81c8b9c8731083fe20f..4edf40b0b7224a18db6d400dec0542418505a7a8 100644 (file)
@@ -86,7 +86,6 @@
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
index d02d7fc58867facb0ce9cbfe1325b1c10482639d..1fa4aa3734d139af3eef37fb038c5b90180f65d6 100644 (file)
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define QIXIS_LBMAP_SWITCH             0x06
index 09484dc6094be8b0be0db1477797b880ad2ffc3e..e1c66c5dcc0dcca4f5147ebac211c1ecbae56ae2 100644 (file)
 #define CONFIG_SYS_NAND_FTIM3          0x0
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_MTD_NAND_VERIFY_WRITE
 
 #define QIXIS_LBMAP_SWITCH             0x06
index 4bf4496dafc1c2b78c5895775dbf5429bfe39996..f8bd31d702f817ab33b46ef0bfeb1a7e1b722364 100644 (file)
@@ -44,7 +44,6 @@
  * NAND
  */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           NFC_BASE_ADDR_AXI
 #define CONFIG_MXC_NAND_REGS_BASE      NFC_BASE_ADDR_AXI
 #define CONFIG_MXC_NAND_IP_REGS_BASE   NFC_BASE_ADDR
index b35ba59aba9973b6d99f61aff7340d68802e1d8f..b90a84da8ad7ce335aae8ffa7749e533877e3ced 100644 (file)
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_NS16550_COM1                NV_PA_APB_UARTD_BASE
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Environment in NAND, aligned to start of last sector */
 
index cffcd9dd2f245b5d92552c6bfee6c4ea7589f341..9f913fad168f5125ec4bd3ad1fa530b7a1e7200f 100644 (file)
@@ -52,7 +52,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-# define CONFIG_SYS_MAX_NAND_DEVICE            1
 # define CONFIG_SYS_NAND_BASE                  ATMEL_BASE_CS3 /* 0x40000000 */
 # define CONFIG_SYS_NAND_DBW_8
 # define CONFIG_SYS_NAND_MASK_ALE              (1 << 21)
index 554c435842bd377214a60d145e7ba8e733291e3e..6a55e7a32757e22a30baa337fcfa1e2b6878770e 100644 (file)
@@ -21,7 +21,6 @@
 #define MMC_SUPPORTS_TUNING
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Serial SPL */
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL)
index 20e00ec72226a7626179aefd14f6ad3dae6bca5c..6d4fff3820c15a99f520dba5693ddc96b794e0dc 100644 (file)
@@ -61,8 +61,5 @@
 /*
  * Common NAND configuration
  */
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif
 
 #endif /* _MV_COMMON_H */
index 5a956f0a3e36c031c24675480c07af51bf864c19..5debd9117c6e547d31c029e9be7c26557b8aba69 100644 (file)
@@ -25,8 +25,6 @@
 
 /* When runtime detection fails this is the default */
 
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-
 /* USB ethernet */
 
 /*
index c76e7ea1605a4d6e855eac838f43fe6582b682dc..7e54bb2312bcfe12d382d88e3e09dff76465528f 100644 (file)
@@ -36,7 +36,6 @@
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
index c878041400465887e4ed649424c6bff7eb4f0460..407b64383ee6466967136f75e4f5fbfab7e6d273 100644 (file)
@@ -86,7 +86,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC3_BASE_ADDR
 
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
index b96341a587c4f4c0b00c525ba90502d37a697aa2..2a97d2fac46584da7a51f8726fa0f89a0a63299f 100644 (file)
@@ -93,7 +93,6 @@
  */
 #ifdef CONFIG_NAND_MXS
 /* NAND stuff */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* DMA stuff, needed for GPMI/MXS NAND support */
index fc15ed82c6ed1ad18eb4be8719c451b273b1f7f3..e8610386f04e4ca7ddc852993ceed41ea002da1e 100644 (file)
@@ -83,7 +83,6 @@
 
 /* NAND */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x60000000
 #endif
 
index 4162ee8caa21ff74ea9b260520a0d233aa5f2169..bb68ddbd39da9a1703d3647ec9ba5a807587873f 100644 (file)
@@ -30,7 +30,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* USB Configs */
index 217427a302e79a4cf5dfb3c8e7b9d57f05001643..8ff26feb741d24a834593257184a28425f9ee470 100644 (file)
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* USB Configs */
index 373eb9119cd2c3a1c0957b222e79ba55dd36491c..6e69b3de755dadeda55a91323028cddfed50c8ad 100644 (file)
@@ -46,8 +46,4 @@
 
 /** EMMC specific defines */
 
-#if defined(CONFIG_NAND_OCTEONTX)
-#define CONFIG_SYS_MAX_NAND_DEVICE 8
-#endif
-
 #endif /* __OCTEONTX_COMMON_H__ */
index ad3dbbcac52f918b3c692c4845575b77b70f5336..d46ca337d5f8944d00d055241d630250994b9e1f 100644 (file)
@@ -21,7 +21,6 @@
 /* NAND */
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_FLASH_BASE          NAND_BASE
-#define CONFIG_SYS_MAX_NAND_DEVICE      1
 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
                                          10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE         512
index c47d5573c46af58eaba2d4a457879eb98a46e389..77629d7fc1ea6c6c8afba6159210dd376c4a4392 100644 (file)
@@ -26,7 +26,6 @@
 /* NAND */
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_FLASH_BASE          NAND_BASE
-#define CONFIG_SYS_MAX_NAND_DEVICE      1
 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
                                          10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE         512
index 1af87b271c4fa3e551c129877bcaffada566c4c7..442a3cad2206b0940b2b4d6a4e5c8bb829f50867 100644 (file)
@@ -16,7 +16,6 @@
 
 /* Board NAND Info. */
 #ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1         /* Max number of */
                                                  /* NAND devices */
 #define CONFIG_SYS_NAND_ECCPOS         {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
                                         13, 14, 16, 17, 18, 19, 20, 21, 22, \
index c644768ae7d716afced4fd79a998d63032076b76..df4a16fd0815bfc9ba7999b6d650cb205c0f0569 100644 (file)
 #define CONFIG_SYS_NAND_MASK_CLE       0x10
 #define CONFIG_SYS_NAND_MASK_ALE       0x8
 #undef CONFIG_SYS_NAND_HW_ECC
-#define CONFIG_SYS_MAX_NAND_DEVICE     1 /* Max number of NAND devices */
 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
 #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    SZ_512K
index fcb287d6410a21328cef55711ea79256768213e0..2555953f53137796f019bc1709242824ca00a8c4 100644 (file)
 #endif
 
 #define CONFIG_SYS_NAND_BASE_LIST      { CONFIG_SYS_NAND_BASE }
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
        | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
index 6e593da936cddf98e12f87dd0f18d476ce0c6531..5b38a94aa5d1a4d0367edb47e2efe60b3582fdf7 100644 (file)
@@ -42,7 +42,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* USB Configs */
index ae81b8e214e23c2209653a715e6ab8393e225f35..688d161964a4a18f1f1d52f977f6c611e0d45527 100644 (file)
@@ -44,7 +44,6 @@
 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 
 /* USB Configs */
index a8cfec96595999e1bbeb2ad01baba443f8733274..a04a03a7e18139ddc923efa5693fc23172795352 100644 (file)
@@ -14,8 +14,6 @@
 
 /* NAND support */
 
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-
 /* if no target-specific extra environment settings were defined by the
    target, define an empty one */
 #ifndef PCM052_EXTRA_ENV_SETTINGS
index cff71df1c9620444f17e28d31d9f91069d3233f8..01190904cf6f71663126a0f64a016a34d486fa23 100644 (file)
@@ -15,7 +15,6 @@
 #define PHYS_SDRAM_SIZE                (1u * 1024 * 1024 * 1024)
 
 /* Enable NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
index 9a4a632a521d315728739c411c599768ecaf74ce..09f0ed9b9a1b5a719f44a3008c1f76997f2f9512 100644 (file)
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_NS16550_COM1                NV_PA_APB_UARTD_BASE
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Environment in NAND, aligned to start of last sector */
 
index 7f9442acbbd7aeb401d94e9e5c67dea9564070a8..278f1b5cc622361455cfb63724f67c406bd4e6a6 100644 (file)
 #define PHYS_SDRAM_SIZE                                0x04000000      /* 64 megs */
 
 /* NAND flash */
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   0x40000000
 #define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD22 */
index 00d159f03cf3b01cfa180695307c420a470b2f4b..7c23206a30064ac760c92becc22318d5a1a91009 100644 (file)
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
index 69f3d0658784fd2f1083654fd20a747c2245629f..fa47a3ed7935ce113cc33ce1ae04cf6287042819 100644 (file)
@@ -25,7 +25,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
index 90f548cc6c137936257f415dfb8a7b4c85e61b51..ebf5467ef41e342a473ac47789a8824cff1bc0e3 100644 (file)
@@ -58,7 +58,6 @@
 
 /* nand driver parameters */
 #ifdef CONFIG_TARGET_PRESIDIO_ASIC
-       #define CONFIG_SYS_MAX_NAND_DEVICE      1
        #define CONFIG_SYS_NAND_BASE            CONFIG_SYS_FLASH_BASE
        #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
 #endif
index b9b56d9f1a046ac0a86aac0e9e9587aaa0110e3d..70c6ec5b65c622b96b615f4fa90fe6c19403be78 100644 (file)
@@ -28,7 +28,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
 #define CONFIG_SYS_NAND_MASK_ALE       BIT(21)
 #define CONFIG_SYS_NAND_MASK_CLE       BIT(22)
index 3b91e83683a6c9fab80cc897e50a6c1eb72f6ad3..9281c7ccc40213dda4fce28fdf606a835c2709ac 100644 (file)
@@ -21,7 +21,6 @@
 
 /* NAND Flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       BIT(21)
index fad65cb112343f9668a681da889d4a66a995f1ee..301e8c900c4b85f11b969edc85a860c8c6b2a307 100644 (file)
@@ -29,7 +29,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x60000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index ccb3842c1c2bc5e49b781fc5ceeba81fec341090..1c94193e96b236e920a89f568a2305f82a391904 100644 (file)
@@ -38,7 +38,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x60000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index d5cd45ca5c3a75b528baf4f4abaf4298c4d11096..eac41449cb009dbd60d65b229f3e02bfb4e2f9da 100644 (file)
@@ -17,7 +17,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x80000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index 411ed29ab3cbbfd9a144c4c5a8d187d38dfb319c..bc5312d32c6b912412c527e3e8f2589e9bf3d923 100644 (file)
@@ -17,7 +17,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x80000000
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index e6c200f7612295e2f57cb941b80301f2c95fc6aa..c7f03a1e754335b7e2fe2bf573c30873f668c8b6 100644 (file)
@@ -29,7 +29,6 @@
 /* NAND support */
 
 /* Max number of NAND devices */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 #include "tegra-common-post.h"
 
index 5759794b145b7478deb3a0de23c17918eab27fac..87da5e4232c272fb5020203506ad89a3ea9a95d8 100644 (file)
 #define CONFIG_SYS_NAND_BASE           (0x08000000)    /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND
-                                                          devices */
 #endif
 
 #endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */
index 802ed07b9eaf9844d23b90e2721ea8b0eea52524..a77215d19becb60e82846ff28746c709e6ffddac 100644 (file)
@@ -54,7 +54,6 @@
  */
 
 /* NAND flash settings */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index 59bba7d143e28642a96beea16b38b4701213d83a..c56fb378312b88b88ba91b8f3eeb3adc34d5c7f1 100644 (file)
@@ -30,7 +30,6 @@
 
 /* NAND Flash */
 #define CONFIG_SYS_NAND_ECC_BASE       ATMEL_BASE_ECC
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21) /* AD21 */
index c3f30afe2b555396b0678ee8a74c130eba171b3f..f0a33ed27dd58a0c6ed5dea7852e96954967f527 100644 (file)
@@ -80,7 +80,6 @@
  * NAND Support
  */
 #ifdef CONFIG_NAND_DENALI
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_REGS_BASE      SOCFPGA_NANDREGS_ADDRESS
 #define CONFIG_SYS_NAND_DATA_BASE      SOCFPGA_NANDDATA_ADDRESS
 #endif
index 00e8136cc9c09e2e3f4be7139b49def99145eb2b..122aec2287f495fa8904de3d820dbf38e32ac0af 100644 (file)
 #define CONFIG_SYS_FPGA_SIZE           0x00100000      /* 1 MB         */
 
 #define CONFIG_SYS_NAND_BASE           (CONFIG_SYS_FPGA_BASE + 0x70)
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* LIME GDC */
 #define CONFIG_SYS_LIME_BASE           0xc8000000
index 78089b965ae4d8d153d302221ddb7b516617ea3f..222e69c20c01bf7d3559f5dc53dc0d91c9b6d72a 100644 (file)
@@ -25,7 +25,6 @@
 #define CONFIG_SYS_MMC_MAX_DEVICE      2
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /*****************************************************************************/
 #ifdef CONFIG_DISTRO_DEFAULTS
index 214901c557f48fd86dd0e2ffa5f798afe542c8ad..6103c2cea7f8ba83cf9803e272eecff8af5f450d 100644 (file)
@@ -25,7 +25,6 @@
 #define CONFIG_SYS_MMC_MAX_DEVICE      3
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Ethernet need */
 #ifdef CONFIG_DWC_ETH_QOS
index 12666b7818bad5ff77c4f1d78be55bb1a3b953a9..f9c701b90bb72b30d9cccacf7c6c4803677bd533 100644 (file)
@@ -73,7 +73,6 @@
 
 #ifdef CONFIG_NAND_SUNXI
 #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
-#define CONFIG_SYS_MAX_NAND_DEVICE 8
 #endif
 
 /* mmc config */
index a29652dd56ed775279bcf9d070b054849648c5a9..45780d9a4ea02dab1369fc1ef87addebde15bf8b 100644 (file)
@@ -54,7 +54,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
 #define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
index 432ccbdc32b9a997806d8131a3870054029a4c61..2377b47e0541998d095b214cf62b181a9dc615a7 100644 (file)
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_NS16550_COM1                NV_PA_APB_UARTD_BASE
 
 /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* Environment in NAND, aligned to start of last sector */
 
index 1aca83a9bcebe776d06b691ce0275ebe13278eb3..82add65ec0dd658f5b748d03cd71424752f3290a 100644 (file)
@@ -43,7 +43,6 @@
  * access CS0 at is 0x8000000.
  */
 #define CONFIG_SYS_NAND_BASE           0x8000000
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 
 /* NAND: SPL related configs */
 
index 29a6038f8985985e959ee269b16d402140ad6c2e..4078413d0f5123a8128b6639debf897b6a7790aa 100644 (file)
@@ -69,7 +69,6 @@
 
 #define CONFIG_SYS_NAND_LARGEPAGE
 #define CONFIG_SYS_NAND_BASE_LIST              { 0x30000000, }
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
 
 #define DFU_ALT_INFO_MMC \
index 727c6483193a0a740e9dd29ca19aead7710304e3..44706c7733a03f4370dfc96a6cb1b42721a4ca37 100644 (file)
@@ -19,7 +19,6 @@
 #ifndef CONFIG_SYS_NAND_BASE
 #define CONFIG_SYS_NAND_BASE           0x8000000
 #endif
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #endif
 
 /* Now for the remaining common defines */
index d9e95abcc121b198bf00e6e25034e42b7e0a6649..b92fe3894214f8240ffd3f1da8d434e763a374c0 100644 (file)
@@ -42,7 +42,6 @@
 #define CONFIG_SYS_TIMER_RATE                  1000000
 #endif
 
-#define CONFIG_SYS_MAX_NAND_DEVICE                     1
 #define CONFIG_SYS_NAND_REGS_BASE                      0x68100000
 #define CONFIG_SYS_NAND_DATA_BASE                      0x68000000
 
index e0dde1cc83658ebc7a9b769dcac5d4ab370d5ac8..44eaeda432a760a3761b7dfeaf4f7abf7e96b7dc 100644 (file)
@@ -33,7 +33,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
index c13f2ba196e63ac94a1b330f56ca482d7006f68e..dde6d130caa63010aeb93c3486660a1c76d4a2b8 100644 (file)
@@ -14,7 +14,6 @@
 /* NAND support */
 
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           NFC_BASE_ADDR
 
 /* Dynamic MTD partition support */
index f53ea3ccd2157bb0c313024b2348d64fcebe4226..e1f9f12523fbc14de459ea74b8814ea343b7af83 100644 (file)
@@ -42,7 +42,6 @@
  */
 
 /* driver configuration */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
 #define CONFIG_SYS_MAX_NAND_CHIPS 1
 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
 
index cb126837b9ca3e5ec955c89a191841e4ebec0fd8..0add626e81a5bc3dd0516c69fd385a2f423a27dd 100644 (file)
@@ -27,7 +27,6 @@
  */
 
 /* NAND */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
 
 #define BBT_CUSTOM_SCAN
 #define BBT_CUSTOM_SCAN_PAGE 0
index f72f3e644768005a628078f48bc2f4ebc7213b71..60f007a10fcd25991af5da7ccd71de816272b84b 100644 (file)
        EFI_GUID(0xcf9ecfd4, 0x938b, 0x41c5, 0x85, 0x51, \
                 0x1f, 0x88, 0x3a, 0xb7, 0xdc, 0x18)
 
-#ifdef CONFIG_NAND_ARASAN
-# define CONFIG_SYS_MAX_NAND_DEVICE    1
-#endif
-
 /* Miscellaneous configurable options */
 
 #if defined(CONFIG_ZYNQMP_USB)
index dc0cba0010361ad2f13ee43a654666b81a7dbbb9..e194e77e5b773af8a423d30fee0d91fe17e2831e 100644 (file)
 # define CONFIG_FLASH_SHOW_PROGRESS    10
 #endif
 
-#ifdef CONFIG_NAND_ZYNQ
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-#endif
-
 #ifdef CONFIG_USB_EHCI_ZYNQ
 # define DFU_DEFAULT_POLL_TIMEOUT      300
 # define CONFIG_THOR_RESET_OFF