arm: socfpga: fix qspi flash compatible (add "spi-flash")

This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts b/arch/arm/dts/socfpga_arria5_socdk.dts
index 1e91a65af6b197ec331231c1eb80a9400d8a11f1..4e4b619f4f9cb071cbce21d11ee88028cb67233f 100644 (file)
--- a/arch/arm/dts/socfpga_arria5_socdk.dts
+++ b/arch/arm/dts/socfpga_arria5_socdk.dts
@@ -88,7 +88,7 @@
                u-boot,dm-pre-reloc;
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "n25q00";
+               compatible = "n25q00", "spi-flash";
                reg = <0>;      /* chip select */
                spi-max-frequency = <50000000>;
                m25p,fast-read;

diff --git a/arch/arm/dts/socfpga_cyclone5_is1.dts b/arch/arm/dts/socfpga_cyclone5_is1.dts
index 2e2b71fefb6c4771b0f4b98741f9eb4e2e541e74..ea323a16caac3ad80600bca185938f4b87eb2b78 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_is1.dts
+++ b/arch/arm/dts/socfpga_cyclone5_is1.dts
@@ -87,7 +87,7 @@
                u-boot,dm-pre-reloc;
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "n25q00";
+               compatible = "n25q00", "spi-flash";
                reg = <0>;      /* chip select */
                spi-max-frequency = <100000000>;
                m25p,fast-read;

diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index 95a8e653d7f51855db33407047394fe1f5b65835..3af51134bbec6c5e97951641cf005541cc1ca0ab 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -98,7 +98,7 @@
                u-boot,dm-pre-reloc;
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "n25q00";
+               compatible = "n25q00", "spi-flash";
                reg = <0>;      /* chip select */
                spi-max-frequency = <100000000>;
                m25p,fast-read;

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index e3ae8a820795d17cbabdbf564ed95313fccd76df..e612eeed4ffc787246d4f676c5ac6c418395bd92 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -68,7 +68,7 @@
        flash0: n25q00@0 {
                #address-cells = <1>;
                #size-cells = <1>;
-               compatible = "n25q00";
+               compatible = "n25q00", "spi-flash";
                reg = <0>;      /* chip select */
                spi-max-frequency = <50000000>;
                m25p,fast-read;