clk/qcom: move from mach-snapdragon

Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.

To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>

diff --git a/MAINTAINERS b/MAINTAINERS
index 4fec063a242fff750c14750953381266e623bf85..185f5ebbb17208cb1d254238a3eddf85fa63fb2c 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -575,6 +575,7 @@ M:  Neil Armstrong <neil.armstrong@linaro.org>
 R:     Sumit Garg <sumit.garg@linaro.org>
 S:     Maintained
 F:     arch/arm/mach-snapdragon/
+F:     drivers/clk/qcom/
 F:     drivers/gpio/msm_gpio.c
 F:     drivers/mmc/msm_sdhci.c
 F:     drivers/phy/msm8916-usbh-phy.c

diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
index 2fc1521e2d306f6d34abbf52f7767a44497f6106..dde37eccc55e4e2df05cac9f5cbaa43cdb58f5f5 100644 (file)
--- a/arch/arm/mach-snapdragon/Kconfig
+++ b/arch/arm/mach-snapdragon/Kconfig
@@ -15,6 +15,7 @@ config SPL_SYS_MALLOC_F_LEN
 config SDM845
        bool "Qualcomm Snapdragon 845 SoC"
        select LINUX_KERNEL_IMAGE_HEADER
+       imply CLK_QCOM_SDM845
 
 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
        default 0x80000000
@@ -26,6 +27,7 @@ config TARGET_DRAGONBOARD410C
        bool "96Boards Dragonboard 410C"
        select BOARD_LATE_INIT
        select ENABLE_ARM_SOC_BOOT0_HOOK
+       imply CLK_QCOM_APQ8016
        help
          Support for 96Boards Dragonboard 410C. This board complies with
          96Board Open Platform Specifications. Features:
@@ -39,6 +41,7 @@ config TARGET_DRAGONBOARD410C
 
 config TARGET_DRAGONBOARD820C
        bool "96Boards Dragonboard 820C"
+       imply CLK_QCOM_APQ8096
        help
          Support for 96Boards Dragonboard 820C. This board complies with
          96Board Open Platform Specifications. Features:
@@ -72,6 +75,7 @@ config TARGET_STARQLTECHN
 config TARGET_QCS404EVB
        bool "Qualcomm Technologies, Inc. QCS404 EVB"
        select LINUX_KERNEL_IMAGE_HEADER
+       imply CLK_QCOM_QCS404
        help
          Support for Qualcomm Technologies, Inc. QCS404 evaluation board.
          Features:

diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index cbaaf23f6b560c50f34092e1582a44aee504c8c4..497ee35cf7d3ada80548cf8552f49b55fe60fc39 100644 (file)
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -2,20 +2,15 @@
 #
 # (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
 
-obj-$(CONFIG_SDM845) += clock-sdm845.o
 obj-$(CONFIG_SDM845) += sysmap-sdm845.o
 obj-$(CONFIG_SDM845) += init_sdm845.o
-obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o
 obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o
-obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o
 obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
 obj-y += misc.o
-obj-y += clock-snapdragon.o
 obj-y += dram.o
 obj-y += pinctrl-snapdragon.o
 obj-y += pinctrl-apq8016.o
 obj-y += pinctrl-apq8096.o
 obj-y += pinctrl-qcs404.o
 obj-y += pinctrl-sdm845.o
-obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o
 obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index bfd23a990469e8debe8e172c607fd05cbcdad300..017dd260a544bfd2adfdfdf82a55a6623de4c75c 100644 (file)
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -254,6 +254,7 @@ source "drivers/clk/meson/Kconfig"
 source "drivers/clk/microchip/Kconfig"
 source "drivers/clk/mvebu/Kconfig"
 source "drivers/clk/owl/Kconfig"
+source "drivers/clk/qcom/Kconfig"
 source "drivers/clk/renesas/Kconfig"
 source "drivers/clk/sunxi/Kconfig"
 source "drivers/clk/sifive/Kconfig"

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index af27ceb27da218f8d29489a2618a13a17c0c8982..638ad04baeb05f40cb8688acc83f59640fa144cb 100644 (file)
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_CLK_MPFS) += microchip/
 obj-$(CONFIG_CLK_MVEBU) += mvebu/
 obj-$(CONFIG_CLK_OCTEON) += clk_octeon.o
 obj-$(CONFIG_CLK_OWL) += owl/
+obj-$(CONFIG_CLK_QCOM) += qcom/
 obj-$(CONFIG_CLK_RENESAS) += renesas/
 obj-$(CONFIG_$(SPL_TPL_)CLK_SCMI) += clk_scmi.o
 obj-$(CONFIG_CLK_SIFIVE) += sifive/

diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
new file mode 100644 (file)
index 0000000..a884f07
--- /dev/null
+++ b/drivers/clk/qcom/Kconfig
@@ -0,0 +1,44 @@
+if ARCH_SNAPDRAGON || ARCH_IPQ40XX
+
+config CLK_QCOM
+       bool
+       depends on CLK && DM_RESET
+       def_bool n
+
+menu "Qualcomm clock drivers"
+
+config CLK_QCOM_APQ8016
+       bool "Qualcomm APQ8016 GCC"
+       select CLK_QCOM
+       help
+         Say Y here to enable support for the Global Clock Controller
+         on the Snapdragon APQ8016 SoC. This driver supports the clocks
+         and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_APQ8096
+       bool "Qualcomm APQ8096 GCC"
+       select CLK_QCOM
+       help
+         Say Y here to enable support for the Global Clock Controller
+         on the Snapdragon APQ8096 SoC. This driver supports the clocks
+         and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_QCS404
+       bool "Qualcomm QCS404 GCC"
+       select CLK_QCOM
+       help
+         Say Y here to enable support for the Global Clock Controller
+         on the Snapdragon QCS404 SoC. This driver supports the clocks
+         and resets exposed by the GCC hardware block.
+
+config CLK_QCOM_SDM845
+       bool "Qualcomm SDM845 GCC"
+       select CLK_QCOM
+       help
+         Say Y here to enable support for the Global Clock Controller
+         on the Snapdragon 845 SoC. This driver supports the clocks
+         and resets exposed by the GCC hardware block.
+
+endmenu
+
+endif

diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
new file mode 100644 (file)
index 0000000..44d5558
--- /dev/null
+++ b/drivers/clk/qcom/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2023 Linaro
+
+obj-y += clock-qcom.o
+obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o
+obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o
+obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o
+obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o

diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
similarity index 98%
rename from arch/arm/mach-snapdragon/clock-apq8016.c
rename to drivers/clk/qcom/clock-apq8016.c
index 23a37a1714dce883257b5f4a1e9eae6b4dc0c159..90f2a93d9ed5993390a311162b9b473447ffeaac 100644 (file)
--- a/arch/arm/mach-snapdragon/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -13,7 +13,7 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
-#include "clock-snapdragon.h"
+#include "clock-qcom.h"
 
 /* GPLL0 clock control registers */
 #define GPLL0_STATUS_ACTIVE BIT(17)

diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c
similarity index 98%
rename from arch/arm/mach-snapdragon/clock-apq8096.c
rename to drivers/clk/qcom/clock-apq8096.c
index 66184596d5625b32700d716a2da8ffa45e145fdb..d5388c69aefe91cc5ecbbe6cfb5c10b2187d021f 100644 (file)
--- a/arch/arm/mach-snapdragon/clock-apq8096.c
+++ b/drivers/clk/qcom/clock-apq8096.c
@@ -13,7 +13,8 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
-#include "clock-snapdragon.h"
+
+#include "clock-qcom.h"
 
 /* GPLL0 clock control registers */
 #define GPLL0_STATUS_ACTIVE            BIT(30)

diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/drivers/clk/qcom/clock-qcom.c
similarity index 99%
rename from arch/arm/mach-snapdragon/clock-snapdragon.c
rename to drivers/clk/qcom/clock-qcom.c
index 0ac45dce9a9218c727245575b441212e3ecac27b..5667abeb89a453d5e84573b02cc0407e27527f76 100644 (file)
--- a/arch/arm/mach-snapdragon/clock-snapdragon.c
+++ b/drivers/clk/qcom/clock-qcom.c
@@ -13,7 +13,7 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
-#include "clock-snapdragon.h"
+#include "clock-qcom.h"
 
 /* CBCR register fields */
 #define CBCR_BRANCH_ENABLE_BIT  BIT(0)

diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.h b/drivers/clk/qcom/clock-qcom.h
similarity index 100%
rename from arch/arm/mach-snapdragon/clock-snapdragon.h
rename to drivers/clk/qcom/clock-qcom.h

diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c
similarity index 99%
rename from arch/arm/mach-snapdragon/clock-qcs404.c
rename to drivers/clk/qcom/clock-qcs404.c
index 3357b54c30c007a571cdc99c1c0c95787d0dda6e..80218af73ef60fb802c6154f71beb893744f54f9 100644 (file)
--- a/arch/arm/mach-snapdragon/clock-qcs404.c
+++ b/drivers/clk/qcom/clock-qcs404.c
@@ -11,7 +11,7 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
-#include "clock-snapdragon.h"
+#include "clock-qcom.h"
 
 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
 

diff --git a/arch/arm/mach-snapdragon/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
similarity index 98%
rename from arch/arm/mach-snapdragon/clock-sdm845.c
rename to drivers/clk/qcom/clock-sdm845.c
index d6df0365afcaeba911cba6f165fed5283b54824d..95a057b82986fd68614447cec5be85ace59ec096 100644 (file)
--- a/arch/arm/mach-snapdragon/clock-sdm845.c
+++ b/drivers/clk/qcom/clock-sdm845.c
@@ -15,7 +15,7 @@
 #include <asm/io.h>
 #include <linux/bitops.h>
 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
-#include "clock-snapdragon.h"
+#include "clock-qcom.h"
 
 #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }