ARM: mach-at91: add support for sama7g5 chip id and extended id definition

Add SAMA7G5 series chip id definitions to align with linux SoC driver.
Add support for SAMA7G5 System-In-Package (SIP):
SAMA7G54D1G, SAMA7G54D2G, SAMA7G54D4G.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>

diff --git a/arch/arm/mach-at91/armv7/sama7g5_devices.c b/arch/arm/mach-at91/armv7/sama7g5_devices.c
index 0b702c7fb76d5451de38f1e1dccd36e6a1858180..6f2c1fc91429d1763d319c9299859ea58df43505 100644 (file)
--- a/arch/arm/mach-at91/armv7/sama7g5_devices.c
+++ b/arch/arm/mach-at91/armv7/sama7g5_devices.c
@@ -4,7 +4,31 @@
  *                   Eugen Hristev <eugen.hristev@microchip.com>
  */
 
+#include <asm/arch/sama7g5.h>
+
 char *get_cpu_name(void)
 {
-       return "SAMA7G5";
+       unsigned int extension_id = get_extension_chip_id();
+
+       if (cpu_is_sama7g5())
+               switch (extension_id) {
+               case ARCH_EXID_SAMA7G51:
+                       return "SAMA7G51";
+               case ARCH_EXID_SAMA7G52:
+                       return "SAMA7G52";
+               case ARCH_EXID_SAMA7G53:
+                       return "SAMA7G53";
+               case ARCH_EXID_SAMA7G54:
+                       return "SAMA7G54";
+               case ARCH_EXID_SAMA7G54_D1G:
+                       return "SAMA7G54 1Gb DDR3L SiP";
+               case ARCH_EXID_SAMA7G54_D2G:
+                       return "SAMA7G54 2Gb DDR3L SiP";
+               case ARCH_EXID_SAMA7G54_D4G:
+                       return "SAMA7G54 4Gb DDR3L SiP";
+               default:
+                       return "Unknown CPU type";
+               }
+       else
+               return "Unknown CPU type";
 }

diff --git a/arch/arm/mach-at91/include/mach/sama7g5.h b/arch/arm/mach-at91/include/mach/sama7g5.h
index ae43e8700befc0220e57e0166fc9b329208a6c34..621a26f6ebaad7835b399c98b86d8523bc559d8f 100644 (file)
--- a/arch/arm/mach-at91/include/mach/sama7g5.h
+++ b/arch/arm/mach-at91/include/mach/sama7g5.h
@@ -67,7 +67,35 @@
 
 #define ATMEL_BASE_PIT64BC     ATMEL_BASE_PIT64B0
 
+/* SAMA7G5 series chip id definitions */
+#define ARCH_ID_SAMA7G5                0x80162100
+#define ARCH_EXID_SAMA7G51     0x00000003
+#define ARCH_EXID_SAMA7G52     0x00000002
+#define ARCH_EXID_SAMA7G53     0x00000001
+#define ARCH_EXID_SAMA7G54     0x00000000
+#define ARCH_EXID_SAMA7G54_D1G 0x00000018
+#define ARCH_EXID_SAMA7G54_D2G 0x00000020
+#define ARCH_EXID_SAMA7G54_D4G 0x00000028
+
+#define cpu_is_sama7g5()       (get_chip_id() == ARCH_ID_SAMA7G5)
+#define cpu_is_sama7g51()      (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G51))
+#define cpu_is_sama7g52()      (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G52))
+#define cpu_is_sama7g53()      (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G53))
+#define cpu_is_sama7g54()      (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G54))
+#define cpu_is_sama7g54d1g()   (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G54_D1G))
+#define cpu_is_sama7g54d2g()   (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G54_D2G))
+#define cpu_is_sama7g54d4g()   (cpu_is_sama7g5() && \
+               (get_extension_chip_id() == ARCH_EXID_SAMA7G54_D4G))
+
 #ifndef __ASSEMBLY__
+unsigned int get_chip_id(void);
+unsigned int get_extension_chip_id(void);
 char *get_cpu_name(void);
 #endif