arm64: zynqmp: Add mode-pin GPIO controller DT node

Add mode-pin GPIO controller DT node in zynqmp.dtsi and also setup default
reset-gpios property for usb which is default Xilinx setup.

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f2a1f6f541c41075ea36062857031bfc28d6d303.1652262769.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index c44260885023036fd759e232505172cf1b15e330..6b711c810e67fd5a21f691ad2a93960cfc4f3bfd 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -13,6 +13,7 @@
  */
 
 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/power/xlnx-zynqmp-power.h>
 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
 
@@ -189,6 +190,12 @@
                                compatible = "xlnx,zynqmp-pinctrl";
                                status = "disabled";
                        };
+
+                       modepin_gpio: gpio {
+                               compatible = "xlnx,zynqmp-gpio-modepin";
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                       };
                };
        };
 
@@ -874,6 +881,7 @@
                                 <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
                                 <&zynqmp_reset ZYNQMP_RESET_USB0_APB>;
                        reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
+                       reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>;
                        ranges;
 
                        dwc3_0: usb@fe200000 {