default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
- default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
+ default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
default "u-boot.kwb" if ARCH_KIRKWOOD
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include <config.h>
+
+#if defined(CONFIG_HAS_ROM) && defined(CONFIG_FIT)
+&binman {
+ itb {
+ filename = "u-boot.itb";
+ fit {
+ fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
+ description = "FIT image with OP-TEE support";
+ #address-cells = <1>;
+
+ images {
+ uboot {
+ description = "U-Boot";
+ type = "standalone";
+ os = "U-Boot";
+ arch = "arm";
+ compression = "none";
+ load = <CONFIG_SYS_TEXT_BASE>;
+
+ u-boot-nodtb {
+ };
+ };
+ optee {
+ description = "OP-TEE";
+ type = "firmware";
+ arch = "arm";
+ os = "tee";
+ compression = "none";
+ load = <(CONFIG_SYS_SDRAM_BASE + 0x8400000)>;
+ entry = <(CONFIG_SYS_SDRAM_BASE + 0x8400000)>;
+
+ blob-ext {
+ filename = "tee.bin";
+ };
+ };
+ fdt {
+ description = CONFIG_SYS_BOARD;
+ type = "flat_dt";
+ compression = "none";
+
+ u-boot-dtb {
+ };
+ };
+ };
+
+ configurations {
+ default = "conf";
+ conf {
+ description = CONFIG_SYS_BOARD;
+ firmware = "optee";
+ loadables = "uboot";
+ fdt = "fdt";
+ };
+ };
+ };
+ };
+};
+#endif
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/fit_spl_optee.sh"
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_USE_PREBOOT=y
CONFIG_SILENT_CONSOLE=y
CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb"