imx: mx6ul select SYS_L2CACHE_OFF

i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6
chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled.
There is on specific switch for on/off L2 Cache, so default select
SYS_L2CACHE_OFF.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 68b46c10d49f23f5f31e58c9ea28a52f6de42dd3..dce7ffc022ae7ef9d30a29147c509dfdd3cd98f5 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -25,6 +25,10 @@ config MX6SL
 config MX6SX
        bool
 
+config MX6UL
+       select SYS_L2CACHE_OFF
+       bool
+
 choice
        prompt "MX6 board select"
        optional