x86: Convert to use driver model pci on queensbay/crownbay

Move to driver model pci for Intel queensbay/crownbay.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
index d8761fdfbd28523e45b7f1e0b5ef8d068234b6e8..660f9678bd303573ef506986f913382c4377e002 100644 (file)
--- a/arch/x86/cpu/queensbay/Makefile
+++ b/arch/x86/cpu/queensbay/Makefile
@@ -6,4 +6,3 @@
 
 obj-y += fsp_configs.o
 obj-y += tnc.o topcliff.o
-obj-$(CONFIG_PCI) += tnc_pci.o

diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index d27b2d9ec635f1ec6f705fae429cc5b47f816578..de50893e6fb178e8ca906cb46e7a4eff229f1854 100644 (file)
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -25,7 +25,6 @@ static void unprotect_spi_flash(void)
 
 int arch_cpu_init(void)
 {
-       struct pci_controller *hose;
        int ret;
 
        post_code(POST_CPU_INIT);
@@ -37,10 +36,6 @@ int arch_cpu_init(void)
        if (ret)
                return ret;
 
-       ret = pci_early_init_hose(&hose);
-       if (ret)
-               return ret;
-
        unprotect_spi_flash();
 
        return 0;

diff --git a/arch/x86/cpu/queensbay/tnc_pci.c b/arch/x86/cpu/queensbay/tnc_pci.c
deleted file mode 100644 (file)
index 6c291f9..0000000
--- a/arch/x86/cpu/queensbay/tnc_pci.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/pci.h>
-#include <asm/fsp/fsp_support.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_pci_setup_hose(struct pci_controller *hose)
-{
-       hose->first_busno = 0;
-       hose->last_busno = 0;
-
-       /* PCI memory space */
-       pci_set_region(hose->regions + 0,
-                      CONFIG_PCI_MEM_BUS,
-                      CONFIG_PCI_MEM_PHYS,
-                      CONFIG_PCI_MEM_SIZE,
-                      PCI_REGION_MEM);
-
-       /* PCI IO space */
-       pci_set_region(hose->regions + 1,
-                      CONFIG_PCI_IO_BUS,
-                      CONFIG_PCI_IO_PHYS,
-                      CONFIG_PCI_IO_SIZE,
-                      PCI_REGION_IO);
-
-       pci_set_region(hose->regions + 2,
-                      CONFIG_PCI_PREF_BUS,
-                      CONFIG_PCI_PREF_PHYS,
-                      CONFIG_PCI_PREF_SIZE,
-                      PCI_REGION_PREFETCH);
-
-       pci_set_region(hose->regions + 3,
-                      0,
-                      0,
-                      gd->ram_size,
-                      PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
-       hose->region_count = 4;
-}

diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 60da1f544bcd8fb41e34db214d6b1094b31d7d53..3af9cc3d2606ec2a8adfbf39fa134727b17e742d 100644 (file)
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -90,8 +90,12 @@
        pci {
                #address-cells = <3>;
                #size-cells = <2>;
-               compatible = "intel,pci";
+               compatible = "pci-x86";
                device_type = "pci";
+               u-boot,dm-pre-reloc;
+               ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000
+                         0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
+                         0x01000000 0x0 0x2000 0x2000 0 0xe000>;
 
                pcie@17,0 {
                        #address-cells = <3>;

diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index 17e6a72c9d9bad77c62c8441a58a1b323878e27d..aa1232d15169ac9efba324b187343f636267125d 100644 (file)
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -17,6 +17,7 @@ CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_OF_CONTROL=y
 CONFIG_CPU=y
+CONFIG_DM_PCI=y
 CONFIG_SPI_FLASH=y
 CONFIG_VIDEO_VESA=y
 CONFIG_FRAMEBUFFER_SET_VESA_MODE=y