spi: spi-mem: allow specifying whether an op is DTR or not

Each phase is given a separate 'dtr' field so mixed protocols like
4S-4D-4D can be supported.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index c095ae9505a21db9e93da52a07c219909db98567..427f7c13c56a9913ffd2fc18c61a144fe5ba5298 100644 (file)
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -164,6 +164,9 @@ bool spi_mem_default_supports_op(struct spi_slave *slave,
                                   op->data.dir == SPI_MEM_DATA_OUT))
                return false;
 
+       if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
+               return false;
+
        return true;
 }
 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);

diff --git a/include/spi-mem.h b/include/spi-mem.h
index e354c388979e63cd65dcef21c1120a0e8891f95f..8bd44596747924c2c2433971774f1f95216b2478 100644 (file)
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -71,6 +71,7 @@ enum spi_mem_data_dir {
  * struct spi_mem_op - describes a SPI memory operation
  * @cmd.buswidth: number of IO lines used to transmit the command
  * @cmd.opcode: operation opcode
+ * @cmd.dtr: whether the command opcode should be sent in DTR mode or not
  * @addr.nbytes: number of address bytes to send. Can be zero if the operation
  *              does not need to send an address
  * @addr.buswidth: number of IO lines used to transmit the address cycles
@@ -78,10 +79,13 @@ enum spi_mem_data_dir {
  *           Note that only @addr.nbytes are taken into account in this
  *           address value, so users should make sure the value fits in the
  *           assigned number of bytes.
+ * @addr.dtr: whether the address should be sent in DTR mode or not
  * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
  *               be zero if the operation does not require dummy bytes
  * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
+ * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
  * @data.buswidth: number of IO lanes used to send/receive the data
+ * @data.dtr: whether the data should be sent in DTR mode or not
  * @data.dir: direction of the transfer
  * @data.buf.in: input buffer
  * @data.buf.out: output buffer
@@ -90,21 +94,25 @@ struct spi_mem_op {
        struct {
                u8 buswidth;
                u8 opcode;
+               u8 dtr : 1;
        } cmd;
 
        struct {
                u8 nbytes;
                u8 buswidth;
+               u8 dtr : 1;
                u64 val;
        } addr;
 
        struct {
                u8 nbytes;
                u8 buswidth;
+               u8 dtr : 1;
        } dummy;
 
        struct {
                u8 buswidth;
+               u8 dtr : 1;
                enum spi_mem_data_dir dir;
                unsigned int nbytes;
                /* buf.{in,out} must be DMA-able. */