]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: k3-am625*: Sync with kernel v6.7-rc1
authorNishanth Menon <nm@ti.com>
Wed, 15 Nov 2023 03:28:54 +0000 (21:28 -0600)
committerTom Rini <trini@konsulko.com>
Wed, 22 Nov 2023 18:47:39 +0000 (13:47 -0500)
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly.

Tested-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm/dts/k3-am62-main.dtsi
arch/arm/dts/k3-am62-mcu.dtsi
arch/arm/dts/k3-am62-verdin-wifi.dtsi
arch/arm/dts/k3-am62-verdin.dtsi
arch/arm/dts/k3-am62-wakeup.dtsi
arch/arm/dts/k3-am62.dtsi
arch/arm/dts/k3-am625-beagleplay.dts
arch/arm/dts/k3-am625-sk.dts
arch/arm/dts/k3-am62x-sk-common.dtsi

index 284b90c94da8a2e665d8d1dd2159a88dbb487af0..e5c64c86d1d5aeed66c385a28813b77ea3421019 100644 (file)
@@ -81,7 +81,8 @@
        };
 
        dmss: bus@48000000 {
-               compatible = "simple-mfd";
+               bootph-all;
+               compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <2>;
                dma-ranges;
@@ -90,6 +91,7 @@
                ti,sci-dev-id = <25>;
 
                secure_proxy_main: mailbox@4d000000 {
+                       bootph-all;
                        compatible = "ti,am654-secure-proxy";
                        #mbox-cells = <1>;
                        reg-names = "target_data", "rt", "scfg";
        };
 
        dmsc: system-controller@44043000 {
+               bootph-all;
                compatible = "ti,k2g-sci";
                ti,host-id = <12>;
                mbox-names = "rx", "tx";
                reg = <0x00 0x44043000 0x00 0xfe0>;
 
                k3_pds: power-controller {
+                       bootph-all;
                        compatible = "ti,sci-pm-domain";
                        #power-domain-cells = <2>;
                };
 
                k3_clks: clock-controller {
+                       bootph-all;
                        compatible = "ti,k2g-sci-clk";
                        #clock-cells = <2>;
                };
 
                k3_reset: reset-controller {
+                       bootph-all;
                        compatible = "ti,sci-reset";
                        #reset-cells = <2>;
                };
        };
 
        secure_proxy_sa3: mailbox@43600000 {
+               bootph-pre-ram;
                compatible = "ti,am654-secure-proxy";
                #mbox-cells = <1>;
                reg-names = "target_data", "rt", "scfg";
        };
 
        main_pmx0: pinctrl@f4000 {
+               bootph-all;
                compatible = "pinctrl-single";
                reg = <0x00 0xf4000 0x00 0x2ac>;
                #pinctrl-cells = <1>;
        };
 
        main_esm: esm@420000 {
+               bootph-pre-ram;
                compatible = "ti,j721e-esm";
                reg = <0x00 0x420000 0x00 0x1000>;
                ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
        };
 
        main_timer0: timer@2400000 {
+               bootph-all;
                compatible = "ti,am654-timer";
                reg = <0x00 0x2400000 0x00 0x400>;
                interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
index 80a3e1db26a97c0c65ce436565a2943682e00bca..0e0b234581c637c89983eb04a3754aa2eaa0c101 100644 (file)
@@ -7,6 +7,7 @@
 
 &cbass_mcu {
        mcu_pmx0: pinctrl@4084000 {
+               bootph-all;
                compatible = "pinctrl-single";
                reg = <0x00 0x04084000 0x00 0x88>;
                #pinctrl-cells = <1>;
@@ -15,6 +16,7 @@
        };
 
        mcu_esm: esm@4100000 {
+               bootph-pre-ram;
                compatible = "ti,j721e-esm";
                reg = <0x00 0x4100000 0x00 0x1000>;
                ti,esm-pins = <0>, <1>, <2>, <85>;
index 90ddc71bcd3064aabb630c5457d6197fe3ea2db3..a6808b10c7b26d43156d35b45077e2a8c2ef7549 100644 (file)
 &main_uart5 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart5>;
+       uart-has-rtscts;
        status = "okay";
+
+       bluetooth {
+               compatible = "nxp,88w8987-bt";
+               fw-init-baudrate = <3000000>;
+       };
 };
index 40992e7e4c3084cca1226d32c5fe8ea0a66ec949..5db52f2372534b4bababbe360b367970cb1546a6 100644 (file)
                vddc-supply = <&reg_1v2_dsi>;
                vddmipi-supply = <&reg_1v2_dsi>;
                vddio-supply = <&reg_1v8_dsi>;
+               status = "disabled";
 
                dsi_bridge_ports: ports {
                        #address-cells = <1>;
index eae0528871862852aa19670fb6f1ccde5e334f56..fef76f52a52e30f27c619d4cb9508282180604a6 100644 (file)
@@ -7,6 +7,7 @@
 
 &cbass_wakeup {
        wkup_conf: syscon@43000000 {
+               bootph-all;
                compatible = "syscon", "simple-mfd";
                reg = <0x00 0x43000000 0x00 0x20000>;
                #address-cells = <1>;
@@ -14,6 +15,7 @@
                ranges = <0x0 0x00 0x43000000 0x20000>;
 
                chipid: chipid@14 {
+                       bootph-all;
                        compatible = "ti,am654-chipid";
                        reg = <0x14 0x4>;
                };
index 11f14eef2d44affe51f1992f1aa3c648a15d16c3..f1e15206e1ce59a440cde9b489ac674221750ac4 100644 (file)
@@ -47,6 +47,7 @@
        };
 
        cbass_main: bus@f0000 {
+               bootph-all;
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <2>;
@@ -86,6 +87,7 @@
                         <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
 
                cbass_mcu: bus@4000000 {
+                       bootph-all;
                        compatible = "simple-bus";
                        #address-cells = <2>;
                        #size-cells = <2>;
@@ -93,6 +95,7 @@
                };
 
                cbass_wakeup: bus@b00000 {
+                       bootph-all;
                        compatible = "simple-bus";
                        #address-cells = <2>;
                        #size-cells = <2>;
index 7cfdf562b53bfe53502f70b24e8afd1899cf4859..9a6bd0a3c94f724270ddfd5a4dc8eaea333e967f 100644 (file)
@@ -46,6 +46,7 @@
        };
 
        memory@80000000 {
+               bootph-pre-ram;
                device_type = "memory";
                /* 2G RAM */
                reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -58,7 +59,7 @@
 
                ramoops: ramoops@9ca00000 {
                        compatible = "ramoops";
-                       reg = <0x00 0x9c700000 0x00 0x00100000>;
+                       reg = <0x00 0x9ca00000 0x00 0x00100000>;
                        record-size = <0x8000>;
                        console-size = <0x8000>;
                        ftrace-size = <0x00>;
@@ -83,6 +84,7 @@
        };
 
        vsys_5v0: regulator-1 {
+               bootph-all;
                compatible = "regulator-fixed";
                regulator-name = "vsys_5v0";
                regulator-min-microvolt = <5000000>;
@@ -93,6 +95,7 @@
 
        vdd_3v3: regulator-2 {
                /* output of TLV62595DMQR-U12 */
+               bootph-all;
                compatible = "regulator-fixed";
                regulator-name = "vdd_3v3";
                regulator-min-microvolt = <3300000>;
 
        vdd_3v3_sd: regulator-4 {
                /* output of TPS22918DBVR-U21 */
+               bootph-all;
                pinctrl-names = "default";
                pinctrl-0 = <&vdd_3v3_sd_pins_default>;
 
        };
 
        vdd_sd_dv: regulator-5 {
+               bootph-all;
                compatible = "regulator-gpio";
                regulator-name = "sd_hs200_switch";
                pinctrl-names = "default";
        };
 
        leds {
+               bootph-all;
                compatible = "gpio-leds";
 
                led-0 {
+                       bootph-all;
                        gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "heartbeat";
                        function = LED_FUNCTION_HEARTBEAT;
                };
 
                led-1 {
+                       bootph-all;
                        gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "disk-activity";
                        function = LED_FUNCTION_DISK_ACTIVITY;
                };
 
                led-2 {
+                       bootph-all;
                        gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
                        function = LED_FUNCTION_CPU;
                };
 
                led-3 {
+                       bootph-all;
                        gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
                        function = LED_FUNCTION_LAN;
                };
 
                led-4 {
+                       bootph-all;
                        gpios = <&main_gpio0 9 GPIO_ACTIVE_HIGH>;
                        function = LED_FUNCTION_WLAN;
                };
 
 &main_pmx0 {
        gpio0_pins_default: gpio0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x0004, PIN_INPUT, 7) /* (G25) OSPI0_LBCLKO.GPIO0_1 */
                        AM62X_IOPAD(0x0008, PIN_INPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */
        };
 
        vdd_sd_dv_pins_default: vdd-sd-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
                >;
        };
 
        local_i2c_pins_default: local-i2c-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
                        AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
        };
 
        emmc_pins_default: emmc-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x0220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
                        AM62X_IOPAD(0x0218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
        };
 
        vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1_GPIO1_19 */
                >;
        };
 
        sd_pins_default: sd-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
                        AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
        };
 
        mikrobus_gpio_pins_default: mikrobus-gpio-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x019c, PIN_INPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */
                        AM62X_IOPAD(0x01a0, PIN_INPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */
        };
 
        console_pins_default: console-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
                        AM62X_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
 };
 
 &main_gpio0 {
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&gpio0_pins_default>;
        gpio-line-names = "BL_EN_3V3", "SPE_PO_EN", "RTC_INT",  /* 0-2 */
 };
 
 &main_gpio1 {
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&mikrobus_gpio_pins_default>;
        gpio-line-names = "", "", "", "", "",                   /* 0-4 */
 };
 
 &main_i2c0 {
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&local_i2c_pins_default>;
        clock-frequency = <400000>;
        };
 
        tps65219: pmic@30 {
+               bootph-all;
                compatible = "ti,tps65219";
                reg = <0x30>;
                buck1-supply = <&vsys_5v0>;
 };
 
 &sdhci0 {
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&emmc_pins_default>;
        ti,driver-strength-ohm = <50>;
 
 &sdhci1 {
        /* SD/MMC */
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&sd_pins_default>;
 
 };
 
 &main_uart0 {
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&console_pins_default>;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&wifi_debug_uart_pins_default>;
        status = "okay";
+
+       mcu {
+               compatible = "ti,cc1352p7";
+               reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_LOW>;
+               vdds-supply = <&vdd_3v3>;
+       };
 };
 
 &dss {
index 7c98c1b855d13b321e9f501ec7cdc2785b7806bc..b18092497c9a5342576c9ce8ae3bbcf3712d8a11 100644 (file)
@@ -31,6 +31,7 @@
 
        vmain_pd: regulator-0 {
                /* TPS65988 PD CONTROLLER OUTPUT */
+               bootph-all;
                compatible = "regulator-fixed";
                regulator-name = "vmain_pd";
                regulator-min-microvolt = <5000000>;
@@ -41,6 +42,7 @@
 
        vcc_5v0: regulator-1 {
                /* Output of LM34936 */
+               bootph-all;
                compatible = "regulator-fixed";
                regulator-name = "vcc_5v0";
                regulator-min-microvolt = <5000000>;
@@ -52,6 +54,7 @@
 
        vcc_3v3_sys: regulator-2 {
                /* output of LM61460-Q1 */
+               bootph-all;
                compatible = "regulator-fixed";
                regulator-name = "vcc_3v3_sys";
                regulator-min-microvolt = <3300000>;
@@ -63,6 +66,7 @@
 
        vdd_mmc1: regulator-3 {
                /* TPS22918DBVR */
+               bootph-all;
                compatible = "regulator-fixed";
                regulator-name = "vdd_mmc1";
                regulator-min-microvolt = <3300000>;
@@ -75,6 +79,7 @@
 
        vdd_sd_dv: regulator-4 {
                /* Output of TLV71033 */
+               bootph-all;
                compatible = "regulator-gpio";
                regulator-name = "tlv71033";
                pinctrl-names = "default";
 
 &main_pmx0 {
        main_rgmii2_pins_default: main-rgmii2-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
                        AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
        };
 
        ospi0_pins_default: ospi0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
                        AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
        };
 
        vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
                >;
        };
 
        main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
                >;
        };
 };
 
+&main_gpio0 {
+       bootph-all;
+};
+
+&main_gpio1 {
+       bootph-all;
+};
+
 &main_i2c1 {
+       bootph-all;
        exp1: gpio@22 {
+               bootph-all;
                compatible = "ti,tca6424";
                reg = <0x22>;
                gpio-controller;
        };
 };
 
+&fss {
+       bootph-all;
+};
+
 &ospi0 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&ospi0_pins_default>;
 
        flash@0 {
+               bootph-all;
                compatible = "jedec,spi-nor";
                reg = <0x0>;
                spi-tx-bus-width = <8>;
                cdns,read-delay = <4>;
 
                partitions {
+                       bootph-all;
                        compatible = "fixed-partitions";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        };
 
                        partition@3fc0000 {
+                               bootph-pre-ram;
                                label = "ospi.phypattern";
                                reg = <0x3fc0000 0x40000>;
                        };
index 34c8ffc553ec3dcc45d8e484fe459364418ce2dc..19f57ead4ebd179b6951d27cdfcf6493ad7d2aa0 100644 (file)
@@ -28,6 +28,7 @@
        };
 
        memory@80000000 {
+               bootph-pre-ram;
                device_type = "memory";
                /* 2G RAM */
                reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
                        clocks = <&tlv320_mclk>;
                };
        };
+
+       hdmi0: connector-hdmi {
+               compatible = "hdmi-connector";
+               label = "hdmi";
+               type = "a";
+               port {
+                       hdmi_connector_in: endpoint {
+                               remote-endpoint = <&sii9022_out>;
+                       };
+               };
+       };
 };
 
 &main_pmx0 {
        /* First pad number is ALW package and second is AMC package */
        main_uart0_pins_default: main-uart0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
                        AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
        };
 
        main_uart1_pins_default: main-uart1-default-pins {
+               bootph-pre-ram;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
                        AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
        };
 
        main_mmc0_pins_default: main-mmc0-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
                        AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
        };
 
        main_mmc1_pins_default: main-mmc1-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
                        AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
        };
 
        main_rgmii1_pins_default: main-rgmii1-default-pins {
+               bootph-all;
                pinctrl-single,pins = <
                        AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
                        AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
                        AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */
                >;
        };
+
+       main_dss0_pins_default: main-dss0-default-pins {
+               pinctrl-single,pins = <
+                       AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
+                       AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
+                       AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
+                       AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
+                       AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
+                       AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
+                       AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
+                       AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
+                       AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
+                       AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
+                       AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
+                       AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
+                       AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
+                       AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
+                       AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
+                       AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
+                       AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
+                       AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
+                       AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
+                       AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
+                       AM62X_IOPAD(0x05c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
+                       AM62X_IOPAD(0x060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
+                       AM62X_IOPAD(0x064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
+                       AM62X_IOPAD(0x068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
+                       AM62X_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
+                       AM62X_IOPAD(0x070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
+                       AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
+                       AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
+               >;
+       };
 };
 
 &mcu_pmx0 {
        wkup_uart0_pins_default: wkup-uart0-default-pins {
+               bootph-pre-ram;
                pinctrl-single,pins = <
                        AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
                        AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
 
 &wkup_uart0 {
        /* WKUP UART0 is used by DM firmware */
+       bootph-pre-ram;
        status = "reserved";
        pinctrl-names = "default";
        pinctrl-0 = <&wkup_uart0_pins_default>;
 };
 
 &main_uart0 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_uart0_pins_default>;
 
 &main_uart1 {
        /* Main UART1 is used by TIFS firmware */
+       bootph-pre-ram;
        status = "reserved";
        pinctrl-names = "default";
        pinctrl-0 = <&main_uart1_pins_default>;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_i2c1_pins_default>;
-       clock-frequency = <400000>;
+       clock-frequency = <100000>;
 
        tlv320aic3106: audio-codec@1b {
                #sound-dai-cells = <0>;
                IOVDD-supply = <&vcc_3v3_sys>;
                DRVDD-supply = <&vcc_3v3_sys>;
        };
+
+       sii9022: bridge-hdmi@3b {
+               compatible = "sil,sii9022";
+               reg = <0x3b>;
+               interrupt-parent = <&exp1>;
+               interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
+               #sound-dai-cells = <0>;
+               sil,i2s-data-lanes = < 0 >;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               sii9022_in: endpoint {
+                                       remote-endpoint = <&dpi1_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+
+                               sii9022_out: endpoint {
+                                       remote-endpoint = <&hdmi_connector_in>;
+                               };
+                       };
+               };
+       };
 };
 
 &sdhci0 {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_mmc0_pins_default>;
 
 &sdhci1 {
        /* SD/MMC */
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_mmc1_pins_default>;
 };
 
 &cpsw3g {
+       bootph-all;
        pinctrl-names = "default";
        pinctrl-0 = <&main_rgmii1_pins_default>;
 };
 
 &cpsw_port1 {
+       bootph-all;
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
 };
 
 &cpsw3g_mdio {
+       bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&main_mdio1_pins_default>;
 
        cpsw3g_phy0: ethernet-phy@0 {
+               bootph-all;
                reg = <0>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        tx-num-evt = <32>;
        rx-num-evt = <32>;
 };
+
+&dss {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_dss0_pins_default>;
+};
+
+&dss_ports {
+       /* VP2: DPI Output */
+       port@1 {
+               reg = <1>;
+
+               dpi1_out: endpoint {
+                       remote-endpoint = <&sii9022_in>;
+               };
+       };
+};