]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: renesas: Add Renesas Gray Hawk boards support
authorHai Pham <hai.pham.ud@renesas.com>
Sun, 28 Jan 2024 15:52:08 +0000 (16:52 +0100)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 10 Feb 2024 16:08:06 +0000 (17:08 +0100)
Initial support for the Renesas Gray Hawk CPU and BreakOut boards.

The arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi is extended version of:
https://lore.kernel.org/linux-renesas-soc/b657402113267acd57aece0b4c681b707e704455.1706194617.git.geert+renesas@glider.be/
The version currenty submitted upstream lacks functionality which is
present in this series. Once the upstream support implements that
missing functionality, these DTs will be updated to match.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi [new file with mode: 0644]
arch/arm/dts/r8a779h0-gray-hawk-csi-dsi.dtsi [new file with mode: 0644]
arch/arm/dts/r8a779h0-gray-hawk-ethernet.dtsi [new file with mode: 0644]
arch/arm/dts/r8a779h0-gray-hawk.dts [new file with mode: 0644]

diff --git a/arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi b/arch/arm/dts/r8a779h0-gray-hawk-cpu.dtsi
new file mode 100644 (file)
index 0000000..c8a4621
--- /dev/null
@@ -0,0 +1,166 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the Gray Hawk CPU board
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "r8a779h0.dtsi"
+
+/ {
+       model = "Renesas Gray Hawk CPU board";
+       compatible = "renesas,grayhawk-cpu", "renesas,r8a779h0";
+
+       aliases {
+               ethernet0 = &avb0;
+               serial0 = &hscif0;
+       };
+
+       chosen {
+               bootargs = "ignore_loglevel";
+               stdout-path = "serial0:921600n8";
+       };
+
+       memory@48000000 {
+               device_type = "memory";
+               /* first 128MB is reserved for secure area. */
+               reg = <0x0 0x48000000 0x0 0x78000000>;
+       };
+
+       memory@480000000 {
+               device_type = "memory";
+               reg = <0x4 0x80000000 0x1 0x80000000>;
+       };
+
+       reg_1p8v: regulator-1p8v {
+                       compatible = "regulator-fixed";
+                       regulator-name = "fixed-1.8V";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+                       compatible = "regulator-fixed";
+                       regulator-name = "fixed-3.3V";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-boot-on;
+                       regulator-always-on;
+       };
+};
+
+&avb0 {
+       pinctrl-0 = <&avb0_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&phy0>;
+       tx-internal-delay-ps = <2000>;
+       status = "okay";
+
+       phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-id0022.1622",
+                            "ethernet-phy-ieee802.3-c22";
+               rxc-skew-ps = <1500>;
+               reg = <0>;
+               interrupt-parent = <&gpio7>;
+               interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
+       };
+};
+
+&extal_clk {
+       clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+       clock-frequency = <32768>;
+};
+
+&hscif0 {
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+       clock-frequency = <400000>;
+
+       eeprom@50 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "cpu-board";
+               reg = <0x50>;
+               pagesize = <8>;
+       };
+};
+
+&mmc0 {
+       pinctrl-0 = <&mmc_pins>;
+       pinctrl-1 = <&mmc_pins>;
+       pinctrl-names = "default", "state_uhs";
+
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       bus-width = <8>;
+       no-sd;
+       no-sdio;
+       non-removable;
+       full-pwr-cycle-in-suspend;
+       status = "okay";
+};
+
+&pfc {
+       pinctrl-0 = <&scif_clk_pins>;
+       pinctrl-names = "default";
+
+       avb0_pins: avb0 {
+               mux {
+                       groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
+                                "avb0_txcrefclk";
+                       function = "avb0";
+               };
+
+               pins_mdio {
+                       groups = "avb0_mdio";
+                       drive-strength = <21>;
+               };
+
+               pins_mii {
+                       groups = "avb0_rgmii";
+                       drive-strength = <21>;
+               };
+       };
+
+       hscif0_pins: hscif0 {
+               groups = "hscif0_data", "hscif0_ctrl";
+               function = "hscif0";
+       };
+
+       i2c0_pins: i2c0 {
+               groups = "i2c0";
+               function = "i2c0";
+       };
+
+       mmc_pins: mmc {
+               groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+               function = "mmc";
+               power-source = <1800>;
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk";
+               function = "scif_clk";
+       };
+};
+
+&scif_clk {
+       clock-frequency = <24000000>;
+};
diff --git a/arch/arm/dts/r8a779h0-gray-hawk-csi-dsi.dtsi b/arch/arm/dts/r8a779h0-gray-hawk-csi-dsi.dtsi
new file mode 100644 (file)
index 0000000..fcdd8eb
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the R-Car V4M Gray Hawk CSI/DSI sub-board
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+&i2c0 {
+       eeprom@52 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "csi-dsi-sub-board-id";
+               reg = <0x52>;
+               pagesize = <8>;
+       };
+};
diff --git a/arch/arm/dts/r8a779h0-gray-hawk-ethernet.dtsi b/arch/arm/dts/r8a779h0-gray-hawk-ethernet.dtsi
new file mode 100644 (file)
index 0000000..5a8e598
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the R-Car V4M Gray Hawk Ethernet sub-board
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+&i2c0 {
+       eeprom@53 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "ethernet-sub-board-id";
+               reg = <0x53>;
+               pagesize = <8>;
+       };
+};
diff --git a/arch/arm/dts/r8a779h0-gray-hawk.dts b/arch/arm/dts/r8a779h0-gray-hawk.dts
new file mode 100644 (file)
index 0000000..59e5e49
--- /dev/null
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+/*
+ * Device Tree Source for the Gray Hawk CPU and BreakOut boards
+ *
+ * Copyright (C) 2023 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a779h0-gray-hawk-cpu.dtsi"
+#include "r8a779h0-gray-hawk-csi-dsi.dtsi"
+#include "r8a779h0-gray-hawk-ethernet.dtsi"
+
+/ {
+       model = "Renesas Gray Hawk CPU and Breakout boards based on r8a779h0";
+       compatible = "renesas,gray-hawk-breakout", "renesas,gray-hawk-cpu", "renesas,r8a779h0";
+};
+
+&i2c0 {
+       eeprom@51 {
+               compatible = "rohm,br24g01", "atmel,24c01";
+               label = "breakout-board";
+               reg = <0x51>;
+               pagesize = <8>;
+       };
+};