This code is used on several Intel CPUs. Move it into a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
#
obj-$(CONFIG_HAVE_MRC) += car.o
+ifndef CONFIG_TARGET_EFI
+obj-y += microcode.o
+endif
*/
#include <common.h>
+#include <asm/microcode.h>
#include <asm/msr-index.h>
#include <asm/mtrr.h>
#include <asm/post.h>
#include <asm/processor.h>
#include <asm/processor-flags.h>
-#include <asm/arch/microcode.h>
#define MTRR_PHYS_BASE_MSR(reg) (0x200 + 2 * (reg))
#define MTRR_PHYS_MASK_MSR(reg) (0x200 + 2 * (reg) + 1)
#include <fdtdec.h>
#include <libfdt.h>
#include <asm/cpu.h>
+#include <asm/microcode.h>
#include <asm/msr.h>
#include <asm/msr-index.h>
#include <asm/processor.h>
-#include <asm/arch/microcode.h>
+
+DECLARE_GLOBAL_DATA_PTR;
/**
* struct microcode_update - standard microcode header from Intel
obj-y += lpc.o
obj-y += me_status.o
obj-y += model_206ax.o
-obj-y += microcode_intel.o
obj-y += northbridge.o
obj-y += report_platform.o
obj-y += sata.o
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/lapic.h>
+#include <asm/microcode.h>
#include <asm/msr.h>
#include <asm/mtrr.h>
#include <asm/pci.h>
#include <asm/post.h>
#include <asm/processor.h>
#include <asm/arch/model_206ax.h>
-#include <asm/arch/microcode.h>
#include <asm/arch/pch.h>
#include <asm/arch/sandybridge.h>