ARM: OMAP4+: Fix DPLL programming sequence

All the output clock parameters of a DPLL needs to be programmed before
locking the DPLL. But it is being configured after locking the DPLL which
could potentially bypass DPLL. So fixing this sequence.

Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c
index ef2ac982171fc41fe43e552e649234fde09664d7..2de99357657021f2f3c2e2ac6cb7c93ca0cb171f 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/clocks-common.c
+++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c
@@ -236,6 +236,8 @@ static void do_setup_dpll(u32 const base, const struct dpll_params *params,
                        /* Dpll locked with ideal values for nominal opps. */
                        debug("\n %s Dpll already locked with ideal"
                                                "nominal opp values", dpll);
+
+                       bypass_dpll(base);
                        goto setup_post_dividers;
                }
        }
@@ -251,13 +253,13 @@ static void do_setup_dpll(u32 const base, const struct dpll_params *params,
 
        writel(temp, &dpll_regs->cm_clksel_dpll);
 
+setup_post_dividers:
+       setup_post_dividers(base, params);
+
        /* Lock */
        if (lock)
                do_lock_dpll(base);
 
-setup_post_dividers:
-       setup_post_dividers(base, params);
-
        /* Wait till the DPLL locks */
        if (lock)
                wait_for_lock(base);