8610HPCD: Fix typos in two PCI setup registers.

The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars.  Fix this by removing the 85xx cruft from the
86xx codebase.

Signed-off-by: Jon Loeliger <jdl@freescale.com>

diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 264e95962c70ff77c6f3e8377d6a43e32c0c1bd3..d5a4f0ee87d8f79458c7f63e69f7c6b8ace9f1aa 100644 (file)
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -280,13 +280,12 @@ void pci_init_board(void)
        volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
        volatile ccsr_gur_t *gur = &immap->im_gur;
        uint devdisr = gur->devdisr;
-       uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
-       uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
+       uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 19;
+       uint host_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 16;
 
        printf( " pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
                devdisr, io_sel, host_agent);
 
-
 #ifdef CONFIG_PCIE1
  {
        volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR;

diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index a15c6ec12ab0633f54588f270673571c3ff102e0..6143062e5bde7ab7a94f668be081d926c1e31d41 100644 (file)
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1257,11 +1257,9 @@ typedef struct ccsr_gur {
        uint    porpllsr;       /* 0xe0000 - POR PLL ratio status register */
        uint    porbmsr;        /* 0xe0004 - POR boot mode status register */
 #define MPC86xx_PORBMSR_HA      0x00060000
-#define MPC85xx_PORBMSR_HA             0x00070000
        uint    porimpscr;      /* 0xe0008 - POR I/O impedance status and control register */
        uint    pordevsr;       /* 0xe000c - POR I/O device status regsiter */
 #define MPC86xx_PORDEVSR_IO_SEL                0x000F0000
-#define MPC85xx_PORDEVSR_IO_SEL                0x00380000 /* 85xx platform type */
 #define MPC86xx_PORDEVSR_CORE1TE       0x00000080 /* ASMP (Core1 addr trans) */
        uint    pordbgmsr;      /* 0xe0010 - POR debug mode status register */
        char    res1[12];