]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sunxi: dts: arm64: update devicetree files from Linux-v6.6-rc6
authorAndre Przywara <andre.przywara@arm.com>
Thu, 19 Oct 2023 14:51:39 +0000 (15:51 +0100)
committerAndre Przywara <andre.przywara@arm.com>
Sun, 22 Oct 2023 00:12:25 +0000 (01:12 +0100)
Sync the devicetree files from the official Linux kernel tree, v6.6-rc6.
This is covering Allwinner SoCs with 64-bit ARM cores.

Only small cosmetic changes (clock name fixed), but we add the DT for
the new OrangePi Zero 3 board, for which U-Boot enablement patches are
pending.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
12 files changed:
arch/arm/dts/sun50i-a64.dtsi
arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
arch/arm/dts/sun50i-h616-orangepi-zero.dtsi [new file with mode: 0644]
arch/arm/dts/sun50i-h616-orangepi-zero2.dts
arch/arm/dts/sun50i-h616-x96-mate.dts
arch/arm/dts/sun50i-h618-orangepi-zero3.dts [new file with mode: 0644]
include/dt-bindings/clock/sun50i-h6-ccu.h
include/dt-bindings/clock/sun50i-h616-ccu.h
include/dt-bindings/clock/sun6i-rtc.h
include/dt-bindings/reset/sun50i-h6-ccu.h
include/dt-bindings/reset/sun50i-h6-r-ccu.h
include/dt-bindings/reset/sun50i-h616-ccu.h

index 135762b34fdfb94e50029da252daea3dc75c40ff..2240eaec5ddb1cae15b3cfd606f88e64a851a21a 100644 (file)
@@ -93,6 +93,7 @@
                L2: l2-cache {
                        compatible = "cache";
                        cache-level = <2>;
+                       cache-unified;
                };
        };
 
                        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
                        clock-names = "ahb", "tcon-ch0";
-                       clock-output-names = "tcon-pixel-clock";
+                       clock-output-names = "tcon-data-clock";
                        #clock-cells = <0>;
                        resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
                        reset-names = "lcd", "lvds";
index 686f58e7700497fd462b1f49fcff96a9824dc070..b710f1a0f53acb64df63bc3a442d429da455fda6 100644 (file)
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (C) 2019 Corentin LABBE <clabbe@baylibre.com>
  */
diff --git a/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi b/arch/arm/dts/sun50i-h616-orangepi-zero.dtsi
new file mode 100644 (file)
index 0000000..15290e6
--- /dev/null
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ *
+ * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3.
+ * Excludes PMIC nodes and properties, since they are different between the two.
+ */
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+       aliases {
+               ethernet0 = &emac0;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_RED>;
+                       gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+                       default-state = "on";
+               };
+
+               led-1 {
+                       function = LED_FUNCTION_STATUS;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+               };
+       };
+
+       reg_vcc5v: vcc5v {
+               /* board wide 5V supply directly from the USB-C socket */
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+       };
+
+       reg_usb1_vbus: regulator-usb1-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb1-vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&reg_vcc5v>;
+               enable-active-high;
+               gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
+       };
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+/* USB 2 & 3 are on headers only. */
+
+&emac0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&ext_rgmii_pins>;
+       phy-mode = "rgmii";
+       phy-handle = <&ext_rgmii_phy>;
+       allwinner,rx-delay-ps = <3100>;
+       allwinner,tx-delay-ps = <700>;
+       status = "okay";
+};
+
+&mdio0 {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&mmc0 {
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;  /* PF6 */
+       bus-width = <4>;
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&spi0  {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <40000000>;
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_ph_pins>;
+       status = "okay";
+};
+
+&usbotg {
+       /*
+        * PHY0 pins are connected to a USB-C socket, but a role switch
+        * is not implemented: both CC pins are pulled to GND.
+        * The VBUS pins power the device, so a fixed peripheral mode
+        * is the best choice.
+        * The board can be powered via GPIOs, in this case port0 *can*
+        * act as a host (with a cable/adapter ignoring CC), as VBUS is
+        * then provided by the GPIOs. Any user of this setup would
+        * need to adjust the DT accordingly: dr_mode set to "host",
+        * enabling OHCI0 and EHCI0.
+        */
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_usb1_vbus>;
+       status = "okay";
+};
index cb8600d0ea1ef6007704b840a966494fae19ee0c..d83852e72f063488d5fa50e93de3cb4adf08451c 100644 (file)
@@ -1,99 +1,23 @@
-// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (C) 2020 Arm Ltd.
  */
 
 /dts-v1/;
 
-#include "sun50i-h616.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/leds/common.h>
+#include "sun50i-h616-orangepi-zero.dtsi"
 
 / {
        model = "OrangePi Zero2";
        compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
-
-       aliases {
-               ethernet0 = &emac0;
-               serial0 = &uart0;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               led-0 {
-                       function = LED_FUNCTION_POWER;
-                       color = <LED_COLOR_ID_RED>;
-                       gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
-                       default-state = "on";
-               };
-
-               led-1 {
-                       function = LED_FUNCTION_STATUS;
-                       color = <LED_COLOR_ID_GREEN>;
-                       gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
-               };
-       };
-
-       reg_vcc5v: vcc5v {
-               /* board wide 5V supply directly from the USB-C socket */
-               compatible = "regulator-fixed";
-               regulator-name = "vcc-5v";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               regulator-always-on;
-       };
-
-       reg_usb1_vbus: regulator-usb1-vbus {
-               compatible = "regulator-fixed";
-               regulator-name = "usb1-vbus";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               vin-supply = <&reg_vcc5v>;
-               enable-active-high;
-               gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
-       };
 };
 
-&ehci1 {
-       status = "okay";
-};
-
-/* USB 2 & 3 are on headers only. */
-
 &emac0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&ext_rgmii_pins>;
-       phy-mode = "rgmii";
-       phy-handle = <&ext_rgmii_phy>;
        phy-supply = <&reg_dcdce>;
-       allwinner,rx-delay-ps = <3100>;
-       allwinner,tx-delay-ps = <700>;
-       status = "okay";
-};
-
-&mdio0 {
-       ext_rgmii_phy: ethernet-phy@1 {
-               compatible = "ethernet-phy-ieee802.3-c22";
-               reg = <1>;
-       };
 };
 
 &mmc0 {
        vmmc-supply = <&reg_dcdce>;
-       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;  /* PF6 */
-       bus-width = <4>;
-       status = "okay";
-};
-
-&ohci1 {
-       status = "okay";
 };
 
 &r_rsb {
        vcc-ph-supply = <&reg_aldo1>;
        vcc-pi-supply = <&reg_aldo1>;
 };
-
-&spi0  {
-       status = "okay";
-       pinctrl-names = "default";
-       pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
-
-       flash@0 {
-               #address-cells = <1>;
-               #size-cells = <1>;
-               compatible = "jedec,spi-nor";
-               reg = <0>;
-               spi-max-frequency = <40000000>;
-       };
-};
-
-&uart0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart0_ph_pins>;
-       status = "okay";
-};
-
-&usbotg {
-       /*
-        * PHY0 pins are connected to a USB-C socket, but a role switch
-        * is not implemented: both CC pins are pulled to GND.
-        * The VBUS pins power the device, so a fixed peripheral mode
-        * is the best choice.
-        * The board can be powered via GPIOs, in this case port0 *can*
-        * act as a host (with a cable/adapter ignoring CC), as VBUS is
-        * then provided by the GPIOs. Any user of this setup would
-        * need to adjust the DT accordingly: dr_mode set to "host",
-        * enabling OHCI0 and EHCI0.
-        */
-       dr_mode = "peripheral";
-       status = "okay";
-};
-
-&usbphy {
-       usb1_vbus-supply = <&reg_usb1_vbus>;
-       status = "okay";
-};
index 07424c28b696c90bd33421404fb7547170bc6c5d..959b6fd18483b48eefc23b6eb634604d2a7a52e5 100644 (file)
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (C) 2021 Arm Ltd.
  */
diff --git a/arch/arm/dts/sun50i-h618-orangepi-zero3.dts b/arch/arm/dts/sun50i-h618-orangepi-zero3.dts
new file mode 100644 (file)
index 0000000..00fe28c
--- /dev/null
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616-orangepi-zero.dtsi"
+
+/ {
+       model = "OrangePi Zero3";
+       compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
+};
+
+&emac0 {
+       phy-supply = <&reg_dldo1>;
+};
+
+&ext_rgmii_phy {
+       motorcomm,clk-out-frequency-hz = <125000000>;
+};
+
+&mmc0 {
+       /*
+        * The schematic shows the card detect pin wired up to PF6, via an
+        * inverter, but it just doesn't work.
+        */
+       broken-cd;
+       vmmc-supply = <&reg_dldo1>;
+};
+
+&r_i2c {
+       status = "okay";
+
+       axp313: pmic@36 {
+               compatible = "x-powers,axp313a";
+               reg = <0x36>;
+               #interrupt-cells = <1>;
+               interrupt-controller;
+               interrupt-parent = <&pio>;
+               interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>;  /* PC9 */
+
+               vin1-supply = <&reg_vcc5v>;
+               vin2-supply = <&reg_vcc5v>;
+               vin3-supply = <&reg_vcc5v>;
+
+               regulators {
+                       /* Supplies VCC-PLL, so needs to be always on. */
+                       reg_aldo1: aldo1 {
+                               regulator-always-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcc1v8";
+                       };
+
+                       /* Supplies VCC-IO, so needs to be always on. */
+                       reg_dldo1: dldo1 {
+                               regulator-always-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vcc3v3";
+                       };
+
+                       reg_dcdc1: dcdc1 {
+                               regulator-always-on;
+                               regulator-min-microvolt = <810000>;
+                               regulator-max-microvolt = <990000>;
+                               regulator-name = "vdd-gpu-sys";
+                       };
+
+                       reg_dcdc2: dcdc2 {
+                               regulator-always-on;
+                               regulator-min-microvolt = <810000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-name = "vdd-cpu";
+                       };
+
+                       reg_dcdc3: dcdc3 {
+                               regulator-always-on;
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-name = "vdd-dram";
+                       };
+               };
+       };
+};
+
+&pio {
+       vcc-pc-supply = <&reg_dldo1>;
+       vcc-pf-supply = <&reg_dldo1>;
+       vcc-pg-supply = <&reg_aldo1>;
+       vcc-ph-supply = <&reg_dldo1>;
+       vcc-pi-supply = <&reg_dldo1>;
+};
index a1545cd60e75584c762e188674201a7c5f441646..ef9123d81937db64a687ad034421b9472399c737 100644 (file)
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
 /*
  * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
  */
index 1191aca53ac64ae0fc7a0f24bf6857d072469a95..6f8f01e676284471e22963a0ae62a9aa10321026 100644 (file)
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
 /*
  * Copyright (C) 2020 Arm Ltd.
  */
index c845493e4d37d8b135e074896375233e2f2d3c83..3bd3aa3d57ce11f92ead01be8b93a90d760a28b1 100644 (file)
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
 
 #ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_
 #define _DT_BINDINGS_CLK_SUN6I_RTC_H_
index 81106f4550972c0f1513004f3f50fb95ea06a43f..d038ddfa481822f689b6997bdbb5a241c7f635a1 100644 (file)
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
 /*
  * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
  */
index 7950e799c76df920b916226b5c5063176dc4c48a..d541ade884fcabd80a384eba9f1a27b35f014366 100644 (file)
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
 /*
  * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
  */
index cb6285a8d1285fb95cb004fa19a48ddfe8df35dd..1bd8bb0a11bed8eca4dc24b9d8b77e31aeb2ba9f 100644 (file)
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
 /*
  * Copyright (C) 2020 Arm Ltd.
  */