]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: rockchip: Add Hardkernel ODROID-M1
authorJonas Karlman <jonas@kwiboo.se>
Sat, 22 Jul 2023 14:02:15 +0000 (14:02 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 28 Jul 2023 10:45:03 +0000 (18:45 +0800)
Hardkernel ODROID-M1 is a single board computer with a RK3568B2 SoC,
a slightly modified version of the RK3568 SoC.

Features tested on a ODROID-M1 8GB v1.0 2022-06-13:
- SD-card boot
- eMMC boot
- SPI Flash boot
- PCIe/NVMe/AHCI
- SATA port
- USB host

Device tree is imported from linux v6.4.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/Makefile
arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/rk3568-odroid-m1.dts [new file with mode: 0644]
arch/arm/mach-rockchip/rk3568/Kconfig
board/hardkernel/odroid_m1/Kconfig [new file with mode: 0644]
board/hardkernel/odroid_m1/MAINTAINERS [new file with mode: 0644]
board/hardkernel/odroid_m1/Makefile [new file with mode: 0644]
board/hardkernel/odroid_m1/odroid_m1.c [new file with mode: 0644]
configs/odroid-m1-rk3568_defconfig [new file with mode: 0644]
doc/board/rockchip/rockchip.rst
include/configs/odroid_m1.h [new file with mode: 0644]

index f758ced7b717b5ec3f5849e01845411402ae41b3..bd5887bf750e6054bea9ae155082d81a2ea72333 100644 (file)
@@ -174,6 +174,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
        rk3568-evb.dtb \
        rk3568-nanopi-r5c.dtb \
        rk3568-nanopi-r5s.dtb \
+       rk3568-odroid-m1.dtb \
        rk3568-rock-3a.dtb
 
 dtb-$(CONFIG_ROCKCHIP_RK3588) += \
diff --git a/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi b/arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
new file mode 100644 (file)
index 0000000..0fc360b
--- /dev/null
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+       chosen {
+               stdout-path = &uart2;
+       };
+};
+
+&fspi_dual_io_pins {
+       bootph-all;
+};
+
+&sdhci {
+       cap-mmc-highspeed;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       mmc-hs400-enhanced-strobe;
+       pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
+};
+
+&sfc {
+       bootph-pre-ram;
+       u-boot,spl-sfc-no-dma;
+
+       flash@0 {
+               bootph-pre-ram;
+       };
+};
+
+&uart2 {
+       bootph-all;
+       clock-frequency = <24000000>;
+       status = "okay";
+};
diff --git a/arch/arm/dts/rk3568-odroid-m1.dts b/arch/arm/dts/rk3568-odroid-m1.dts
new file mode 100644 (file)
index 0000000..59ecf86
--- /dev/null
@@ -0,0 +1,744 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Hardkernel Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3568.dtsi"
+
+/ {
+       model = "Hardkernel ODROID-M1";
+       compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
+
+       aliases {
+               ethernet0 = &gmac0;
+               i2c0 = &i2c3;
+               i2c3 = &i2c0;
+               mmc0 = &sdhci;
+               mmc1 = &sdmmc0;
+               serial0 = &uart1;
+               serial1 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial2:1500000n8";
+       };
+
+       dc_12v: dc-12v-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "dc_12v";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+       };
+
+       hdmi-con {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
+       ir-receiver {
+               compatible = "gpio-ir-receiver";
+               gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&ir_receiver_pin>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_power: led-0 {
+                       gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_RED>;
+                       default-state = "keep";
+                       linux,default-trigger = "default-on";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&led_power_pin>;
+               };
+               led_work: led-1 {
+                       gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+                       function = LED_FUNCTION_HEARTBEAT;
+                       color = <LED_COLOR_ID_BLUE>;
+                       linux,default-trigger = "heartbeat";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&led_work_pin>;
+               };
+       };
+
+       rk809-sound {
+               compatible = "simple-audio-card";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hp_det_pin>;
+               simple-audio-card,name = "Analog RK817";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+               simple-audio-card,mclk-fs = <256>;
+               simple-audio-card,widgets =
+                       "Headphone", "Headphones",
+                       "Speaker", "Speaker";
+               simple-audio-card,routing =
+                       "Headphones", "HPOL",
+                       "Headphones", "HPOR",
+                       "Speaker", "SPKO";
+
+               simple-audio-card,cpu {
+                       sound-dai = <&i2s1_8ch>;
+               };
+
+               simple-audio-card,codec {
+                       sound-dai = <&rk809>;
+               };
+       };
+
+       vcc3v3_pcie: vcc3v3-pcie-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3_pcie";
+               enable-active-high;
+               gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vcc3v3_pcie_en_pin>;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               startup-delay-us = <5000>;
+               vin-supply = <&vcc3v3_sys>;
+       };
+
+       vcc3v3_sys: vcc3v3-sys-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3_sys";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&dc_12v>;
+       };
+
+       vcc5v0_sys: vcc5v0-sys-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0_sys";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&dc_12v>;
+       };
+
+       vcc5v0_usb_host: vcc5v0-usb-host-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0_usb_host";
+               enable-active-high;
+               gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&vcc5v0_sys>;
+       };
+
+       vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0_usb_otg";
+               enable-active-high;
+               gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&vcc5v0_sys>;
+       };
+};
+
+&combphy0 {
+       /* Used for USB3 */
+       phy-supply = <&vcc5v0_usb_host>;
+       status = "okay";
+};
+
+&combphy1 {
+       /* Used for USB3 */
+       phy-supply = <&vcc5v0_usb_otg>;
+       status = "okay";
+};
+
+&combphy2 {
+       /* used for SATA */
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+       cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+       cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+       cpu-supply = <&vdd_cpu>;
+};
+
+&gmac0 {
+       assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
+       assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
+       assigned-clock-rates = <0>, <125000000>;
+       clock_in_out = "output";
+       phy-handle = <&rgmii_phy0>;
+       phy-mode = "rgmii";
+       phy-supply = <&vcc3v3_sys>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac0_miim
+                    &gmac0_tx_bus2
+                    &gmac0_rx_bus2
+                    &gmac0_rgmii_clk
+                    &gmac0_rgmii_bus>;
+       status = "okay";
+
+       tx_delay = <0x4f>;
+       rx_delay = <0x2d>;
+};
+
+&gpu {
+       mali-supply = <&vdd_gpu>;
+       status = "okay";
+};
+
+&hdmi {
+       avdd-0v9-supply = <&vdda0v9_image>;
+       avdd-1v8-supply = <&vcca1v8_image>;
+       status = "okay";
+};
+
+&hdmi_in {
+       hdmi_in_vp0: endpoint {
+               remote-endpoint = <&vp0_out_hdmi>;
+       };
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&hdmi_sound {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       vdd_cpu: regulator@1c {
+               compatible = "tcs,tcs4525";
+               reg = <0x1c>;
+               fcs,suspend-voltage-selector = <1>;
+               regulator-name = "vdd_cpu";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-min-microvolt = <800000>;
+               regulator-max-microvolt = <1150000>;
+               regulator-ramp-delay = <2300>;
+               vin-supply = <&vcc3v3_sys>;
+
+               regulator-state-mem {
+                       regulator-off-in-suspend;
+               };
+       };
+
+       rk809: pmic@20 {
+               compatible = "rockchip,rk809";
+               reg = <0x20>;
+               interrupt-parent = <&gpio0>;
+               interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
+               assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
+               assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
+               #clock-cells = <1>;
+               clock-names = "mclk";
+               clocks = <&cru I2S1_MCLKOUT_TX>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
+               rockchip,system-power-controller;
+               #sound-dai-cells = <0>;
+               vcc1-supply = <&vcc3v3_sys>;
+               vcc2-supply = <&vcc3v3_sys>;
+               vcc3-supply = <&vcc3v3_sys>;
+               vcc4-supply = <&vcc3v3_sys>;
+               vcc5-supply = <&vcc3v3_sys>;
+               vcc6-supply = <&vcc3v3_sys>;
+               vcc7-supply = <&vcc3v3_sys>;
+               vcc8-supply = <&vcc3v3_sys>;
+               vcc9-supply = <&vcc3v3_sys>;
+               wakeup-source;
+
+               regulators {
+                       vdd_logic: DCDC_REG1 {
+                               regulator-name = "vdd_logic";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-init-microvolt = <900000>;
+                               regulator-initial-mode = <0x2>;
+                               regulator-min-microvolt = <500000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-ramp-delay = <6001>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vdd_gpu: DCDC_REG2 {
+                               regulator-name = "vdd_gpu";
+                               regulator-always-on;
+                               regulator-init-microvolt = <900000>;
+                               regulator-initial-mode = <0x2>;
+                               regulator-min-microvolt = <500000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-ramp-delay = <6001>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc_ddr: DCDC_REG3 {
+                               regulator-name = "vcc_ddr";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-initial-mode = <0x2>;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                               };
+                       };
+
+                       vdd_npu: DCDC_REG4 {
+                               regulator-name = "vdd_npu";
+                               regulator-init-microvolt = <900000>;
+                               regulator-initial-mode = <0x2>;
+                               regulator-min-microvolt = <500000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-ramp-delay = <6001>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc_1v8: DCDC_REG5 {
+                               regulator-name = "vcc_1v8";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vdda0v9_image: LDO_REG1 {
+                               regulator-name = "vdda0v9_image";
+                               regulator-always-on;
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vdda_0v9: LDO_REG2 {
+                               regulator-name = "vdda_0v9";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vdda0v9_pmu: LDO_REG3 {
+                               regulator-name = "vdda0v9_pmu";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <900000>;
+                               };
+                       };
+
+                       vccio_acodec: LDO_REG4 {
+                               regulator-name = "vccio_acodec";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vccio_sd: LDO_REG5 {
+                               regulator-name = "vccio_sd";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc3v3_pmu: LDO_REG6 {
+                               regulator-name = "vcc3v3_pmu";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <3300000>;
+                               };
+                       };
+
+                       vcca_1v8: LDO_REG7 {
+                               regulator-name = "vcca_1v8";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcca1v8_pmu: LDO_REG8 {
+                               regulator-name = "vcca1v8_pmu";
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+
+                               regulator-state-mem {
+                                       regulator-on-in-suspend;
+                                       regulator-suspend-microvolt = <1800000>;
+                               };
+                       };
+
+                       vcca1v8_image: LDO_REG9 {
+                               regulator-name = "vcca1v8_image";
+                               regulator-always-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc_3v3: SWITCH_REG1 {
+                               regulator-name = "vcc_3v3";
+                               regulator-always-on;
+                               regulator-boot-on;
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+
+                       vcc3v3_sd: SWITCH_REG2 {
+                               regulator-name = "vcc3v3_sd";
+
+                               regulator-state-mem {
+                                       regulator-off-in-suspend;
+                               };
+                       };
+               };
+       };
+};
+
+&i2s0_8ch {
+       status = "okay";
+};
+
+&i2s1_8ch {
+       rockchip,trcm-sync-tx-only;
+       status = "okay";
+};
+
+&mdio0 {
+       rgmii_phy0: ethernet-phy@0 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0x0>;
+               reset-assert-us = <20000>;
+               reset-deassert-us = <100000>;
+               reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+       };
+};
+
+&pcie30phy {
+       status = "okay";
+};
+
+&pcie3x2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_reset_pin>;
+       reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+       vpcie3v3-supply = <&vcc3v3_pcie>;
+       status = "okay";
+};
+
+&pinctrl {
+       fspi {
+               fspi_dual_io_pins: fspi-dual-io-pins {
+                       rockchip,pins =
+                               /* fspi_clk */
+                               <1 RK_PD0 1 &pcfg_pull_none>,
+                               /* fspi_cs0n */
+                               <1 RK_PD3 1 &pcfg_pull_none>,
+                               /* fspi_d0 */
+                               <1 RK_PD1 1 &pcfg_pull_none>,
+                               /* fspi_d1 */
+                               <1 RK_PD2 1 &pcfg_pull_none>;
+               };
+       };
+
+       ir-receiver {
+               ir_receiver_pin: ir-receiver-pin {
+                       /* external pullup to VCC3V3_SYS */
+                       rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       leds {
+               led_power_pin: led-power-pin {
+                       rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+               led_work_pin: led-work-pin {
+                       rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       pcie {
+               pcie_reset_pin: pcie-reset-pin {
+                       rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+               vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
+                       rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       pmic {
+               pmic_int_l: pmic-int-l {
+                       rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+
+       rk809 {
+               hp_det_pin: hp-det-pin {
+                       rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       usb {
+               vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
+                       rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+               vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
+                       rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+};
+
+&pmu_io_domains {
+       pmuio1-supply = <&vcc3v3_pmu>;
+       pmuio2-supply = <&vcc3v3_pmu>;
+       vccio1-supply = <&vccio_acodec>;
+       vccio2-supply = <&vcc_1v8>;
+       vccio3-supply = <&vccio_sd>;
+       vccio4-supply = <&vcc_1v8>;
+       vccio5-supply = <&vcc_3v3>;
+       vccio6-supply = <&vcc_3v3>;
+       vccio7-supply = <&vcc_3v3>;
+       status = "okay";
+};
+
+&saradc {
+       vref-supply = <&vcca_1v8>;
+       status = "okay";
+};
+
+&sata2 {
+       status = "okay";
+};
+
+&sdhci {
+       bus-width = <8>;
+       max-frequency = <200000000>;
+       non-removable;
+       pinctrl-names = "default";
+       pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&vcc_1v8>;
+       status = "okay";
+};
+
+&sdmmc0 {
+       bus-width = <4>;
+       cap-sd-highspeed;
+       cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
+       disable-wp;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
+       sd-uhs-sdr50;
+       vmmc-supply = <&vcc3v3_sd>;
+       vqmmc-supply = <&vccio_sd>;
+       status = "okay";
+};
+
+&sfc {
+       /* Dual I/O mode as the D2 pin conflicts with the eMMC */
+       pinctrl-0 = <&fspi_dual_io_pins>;
+       pinctrl-names = "default";
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <100000000>;
+               spi-rx-bus-width = <2>;
+               spi-tx-bus-width = <1>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "SPL";
+                               reg = <0x0 0xe0000>;
+                       };
+                       partition@e0000 {
+                               label = "U-Boot Env";
+                               reg = <0xe0000 0x20000>;
+                       };
+                       partition@100000 {
+                               label = "U-Boot";
+                               reg = <0x100000 0x200000>;
+                       };
+                       partition@300000 {
+                               label = "splash";
+                               reg = <0x300000 0x100000>;
+                       };
+                       partition@400000 {
+                               label = "Filesystem";
+                               reg = <0x400000 0xc00000>;
+                       };
+               };
+       };
+};
+
+&tsadc {
+       rockchip,hw-tshut-mode = <1>;
+       rockchip,hw-tshut-polarity = <0>;
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};
+
+&usb_host0_ehci {
+       status = "okay";
+};
+
+&usb_host0_ohci {
+       status = "okay";
+};
+
+&usb_host0_xhci {
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usb_host1_ehci {
+       status = "okay";
+};
+
+&usb_host1_ohci {
+       status = "okay";
+};
+
+&usb_host1_xhci {
+       status = "okay";
+};
+
+&usb2phy0 {
+       status = "okay";
+};
+
+&usb2phy0_host {
+       phy-supply = <&vcc5v0_usb_host>;
+       status = "okay";
+};
+
+&usb2phy0_otg {
+       phy-supply = <&vcc5v0_usb_otg>;
+       status = "okay";
+};
+
+&usb2phy1 {
+       status = "okay";
+};
+
+&usb2phy1_host {
+       phy-supply = <&vcc5v0_usb_host>;
+       status = "okay";
+};
+
+&usb2phy1_otg {
+       phy-supply = <&vcc5v0_usb_host>;
+       status = "okay";
+};
+
+&vop {
+       assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
+       assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+       status = "okay";
+};
+
+&vop_mmu {
+       status = "okay";
+};
+
+&vp0 {
+       vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
+               reg = <ROCKCHIP_VOP2_EP_HDMI0>;
+               remote-endpoint = <&hdmi_in_vp0>;
+       };
+};
index 4424a3c47be19042a7ae0ee0a9f1030ccbe9c9b6..f46be3d081fe7fb80624a9baf9f5669e22893230 100644 (file)
@@ -17,6 +17,11 @@ config TARGET_ANBERNIC_RGXX3_RK3566
          and RG503. The correct device tree name will automatically
          be selected by the bootloader.
 
+config TARGET_ODROID_M1_RK3568
+       bool "ODROID-M1"
+       help
+         Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC.
+
 endchoice
 
 config ROCKCHIP_BOOT_MODE_REG
@@ -33,5 +38,6 @@ config SYS_MALLOC_F_LEN
 
 source "board/rockchip/evb_rk3568/Kconfig"
 source "board/anbernic/rgxx3_rk3566/Kconfig"
+source "board/hardkernel/odroid_m1/Kconfig"
 
 endif
diff --git a/board/hardkernel/odroid_m1/Kconfig b/board/hardkernel/odroid_m1/Kconfig
new file mode 100644 (file)
index 0000000..999c494
--- /dev/null
@@ -0,0 +1,15 @@
+if TARGET_ODROID_M1_RK3568
+
+config SYS_BOARD
+       default "odroid_m1"
+
+config SYS_VENDOR
+       default "hardkernel"
+
+config SYS_CONFIG_NAME
+       default "odroid_m1"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+       def_bool y
+
+endif
diff --git a/board/hardkernel/odroid_m1/MAINTAINERS b/board/hardkernel/odroid_m1/MAINTAINERS
new file mode 100644 (file)
index 0000000..165d2d9
--- /dev/null
@@ -0,0 +1,8 @@
+ODROID-M1
+M:     Jonas Karlman <jonas@kwiboo.se>
+S:     Maintained
+F:     board/hardkernel/odroid_m1/
+F:     include/configs/odroid_m1.h
+F:     configs/odroid-m1-rk3568_defconfig
+F:     arch/arm/dts/rk3568-odroid-m1.dts
+F:     arch/arm/dts/rk3568-odroid-m1-u-boot.dtsi
diff --git a/board/hardkernel/odroid_m1/Makefile b/board/hardkernel/odroid_m1/Makefile
new file mode 100644 (file)
index 0000000..ae8ea3d
--- /dev/null
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y  += odroid_m1.o
diff --git a/board/hardkernel/odroid_m1/odroid_m1.c b/board/hardkernel/odroid_m1/odroid_m1.c
new file mode 100644 (file)
index 0000000..4c027f2
--- /dev/null
@@ -0,0 +1 @@
+// SPDX-License-Identifier: GPL-2.0+
diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig
new file mode 100644 (file)
index 0000000..3dda5c1
--- /dev/null
@@ -0,0 +1,111 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a00000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
+CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SF_DEFAULT_MODE=0x1000
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_TARGET_ODROID_M1_RK3568=y
+CONFIG_SPL_STACK=0x400000
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_AHCI=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-odroid-m1.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x4000000
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_INI=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_CRAMFS=y
+CONFIG_MTDPARTS_DEFAULT="nor0:0x100000(reserved),0x200000(uboot),0x100000(splash),0xc00000(Firmware)"
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_AHCI_PCI=y
+CONFIG_DWC_AHCI=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_SF_DEFAULT_BUS=4
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SFC=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_FS_CRAMFS=y
+CONFIG_ERRNO_STR=y
index 78afd49e387ee56e0f9487f38e82dfe9b0df3563..dfbc27a86d69adb885467cd64801ab716d3086f6 100644 (file)
@@ -95,6 +95,7 @@ List of mainline supported Rockchip boards:
 
 * rk3568
      - Rockchip Evb-RK3568 (evb-rk3568)
+     - Hardkernel ODROID-M1 (odroid-m1-rk3568)
 
 * rk3588
      - Rockchip EVB (evb-rk3588)
diff --git a/include/configs/odroid_m1.h b/include/configs/odroid_m1.h
new file mode 100644 (file)
index 0000000..0d2e9fd
--- /dev/null
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __ODROID_M1_H
+#define __ODROID_M1_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+       "cramfsaddr=0x0c000000\0"
+
+#include <configs/rk3568_common.h>
+
+#endif