]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mmc: zynq: parse dt when probing
authorBenedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Tue, 14 Apr 2020 05:32:12 +0000 (07:32 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Mon, 27 Apr 2020 11:53:13 +0000 (13:53 +0200)
Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/mmc/sdhci.c
drivers/mmc/zynq_sdhci.c
include/sdhci.h

index 520c9f9feba7036fe03bddb7caaa6b50f3fcdbc6..372dc0a820174c2708131e2b52905e82bf0574f6 100644 (file)
@@ -839,8 +839,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
                cfg->host_caps &= ~MMC_MODE_HS_52MHz;
        }
 
-       if (!(cfg->voltages & MMC_VDD_165_195) ||
-           (host->quirks & SDHCI_QUIRK_NO_1_8_V))
+       if (!(cfg->voltages & MMC_VDD_165_195))
                caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
                            SDHCI_SUPPORT_DDR50);
 
index da3ff53da10d2c71079b07d26530f8aaec3b6019..18925d01fa0b2ef5145f829ca9527e0274669ee0 100644 (file)
@@ -22,14 +22,12 @@ DECLARE_GLOBAL_DATA_PTR;
 struct arasan_sdhci_plat {
        struct mmc_config cfg;
        struct mmc mmc;
-       unsigned int f_max;
 };
 
 struct arasan_sdhci_priv {
        struct sdhci_host *host;
        u8 deviceid;
        u8 bank;
-       u8 no_1p8;
 };
 
 #if defined(CONFIG_ARCH_ZYNQMP)
@@ -238,8 +236,11 @@ static int arasan_sdhci_probe(struct udevice *dev)
        host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE;
 #endif
 
-       if (priv->no_1p8)
-               host->quirks |= SDHCI_QUIRK_NO_1_8_V;
+       plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
+
+       ret = mmc_of_parse(dev, &plat->cfg);
+       if (ret)
+               return ret;
 
        host->max_clk = clock;
 
@@ -247,7 +248,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
        host->mmc->dev = dev;
        host->mmc->priv = host;
 
-       ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max,
+       ret = sdhci_setup_cfg(&plat->cfg, host, plat->cfg.f_max,
                              CONFIG_ZYNQ_SDHCI_MIN_FREQ);
        if (ret)
                return ret;
@@ -258,7 +259,6 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 {
-       struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
        struct arasan_sdhci_priv *priv = dev_get_priv(dev);
 
        priv->host = calloc(1, sizeof(struct sdhci_host));
@@ -277,10 +277,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 
        priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1);
        priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1);
-       priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
 
-       plat->f_max = dev_read_u32_default(dev, "max-frequency",
-                                          CONFIG_ZYNQ_SDHCI_MAX_FREQ);
        return 0;
 }
 
index aa4378fd5797cf6db4ca129ab3a14283082008fb..0ef8c2ed62d815d5edde433d81e38525705d393a 100644 (file)
 #define SDHCI_QUIRK_BROKEN_HISPD_MODE  BIT(5)
 #define SDHCI_QUIRK_WAIT_SEND_CMD      (1 << 6)
 #define SDHCI_QUIRK_USE_WIDE8          (1 << 8)
-#define SDHCI_QUIRK_NO_1_8_V           (1 << 9)
 
 /* to make gcc happy */
 struct sdhci_host;