ARM: socfpga: Assure correct CPACR configuration

Make sure the ARM CPACR register is zeroed out, this is mandatory
on Arria10.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 26d84be6e963d9b3085a6f27d13d3b70585d7b45..e8c7503fba1f941894572d987d23a9baef9bbe69 100644 (file)
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -21,12 +21,14 @@ DECLARE_GLOBAL_DATA_PTR;
 void s_init(void) {
 #ifndef CONFIG_ARM64
        /*
-        * Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled.
+        * Preconfigure ACTLR and CPACR, make sure Write Full Line of Zeroes
+        * is disabled in ACTLR.
         * This is optional on CycloneV / ArriaV.
         * This is mandatory on Arria10, otherwise Linux refuses to boot.
         */
        asm volatile(
                "mcr p15, 0, %0, c1, c0, 1\n"
+               "mcr p15, 0, %0, c1, c0, 2\n"
                "isb\n"
                "dsb\n"
        ::"r"(0x0));