misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms

QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 644a16dd30b0d1c85df1f4e8ee54356a1c59b555..d22ec70aa55b2d1950feed6b2de3919ee81f9815 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -57,8 +57,7 @@
 #define CONFIG_SYS_BMAN_SWP_ISDR_REG    0x3E80
 #define CONFIG_SYS_QMAN_NUM_PORTALS    10
 #define CONFIG_SYS_QMAN_MEM_BASE       0x500000000
-#define CONFIG_SYS_QMAN_MEM_PHYS       (0xf00000000ull + \
-                                               CONFIG_SYS_QMAN_MEM_BASE)
+#define CONFIG_SYS_QMAN_MEM_PHYS       CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x08000000
 #define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x10000
 #define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x10000

diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 7c22b8d20999fff3bbfbb6cebd52fbd5dad420b6..22faf16751eb202ea806bc1d3f30dda4366fa5d9 100644 (file)
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -24,7 +24,6 @@ void setup_qbman_portals(void)
                                CONFIG_SYS_BMAN_SWP_ISDR_REG;
        void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
                                CONFIG_SYS_QMAN_SWP_ISDR_REG;
-#ifdef CONFIG_PPC
        struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
 
        /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@@ -32,7 +31,6 @@ void setup_qbman_portals(void)
        out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
 #endif
        out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-#endif
 #ifdef CONFIG_FSL_CORENET
        int i;