]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sunxi: display: use common video_ctfb_mode_to_display_timing()
authorGiulio Benetti <giulio.benetti@benettiengineering.com>
Wed, 8 Apr 2020 15:10:12 +0000 (17:10 +0200)
committerStefano Babic <sbabic@denx.de>
Sat, 18 Apr 2020 10:54:43 +0000 (12:54 +0200)
Since video_ctfb_mode_to_display_timing() has been implemented by moving
sunxi_ctfb_mode_to_display_timing() to video_modes.c and it's meant to be
used by other video subsystem, let's use it instead of local
sunxi_ctfb_mode_to_display_timing().

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
drivers/video/sunxi/sunxi_display.c

index 4e1720ef7ea2ed095086bfcc919fdd274e4c042a..40ee009f626acecb309d41129c0b1121dcd97052 100644 (file)
@@ -615,35 +615,6 @@ static void sunxi_lcdc_backlight_enable(void)
                gpio_direction_output(pin, PWM_ON);
 }
 
-static void sunxi_ctfb_mode_to_display_timing(const struct ctfb_res_modes *mode,
-                                             struct display_timing *timing)
-{
-       timing->pixelclock.typ = mode->pixclock_khz * 1000;
-
-       timing->hactive.typ = mode->xres;
-       timing->hfront_porch.typ = mode->right_margin;
-       timing->hback_porch.typ = mode->left_margin;
-       timing->hsync_len.typ = mode->hsync_len;
-
-       timing->vactive.typ = mode->yres;
-       timing->vfront_porch.typ = mode->lower_margin;
-       timing->vback_porch.typ = mode->upper_margin;
-       timing->vsync_len.typ = mode->vsync_len;
-
-       timing->flags = 0;
-
-       if (mode->sync & FB_SYNC_HOR_HIGH_ACT)
-               timing->flags |= DISPLAY_FLAGS_HSYNC_HIGH;
-       else
-               timing->flags |= DISPLAY_FLAGS_HSYNC_LOW;
-       if (mode->sync & FB_SYNC_VERT_HIGH_ACT)
-               timing->flags |= DISPLAY_FLAGS_VSYNC_HIGH;
-       else
-               timing->flags |= DISPLAY_FLAGS_VSYNC_LOW;
-       if (mode->vmode == FB_VMODE_INTERLACED)
-               timing->flags |= DISPLAY_FLAGS_INTERLACED;
-}
-
 static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
                                      bool for_ext_vga_dac)
 {
@@ -673,7 +644,7 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
        lcdc_pll_set(ccm, 0, mode->pixclock_khz, &clk_div, &clk_double,
                     sunxi_is_composite());
 
-       sunxi_ctfb_mode_to_display_timing(mode, &timing);
+       video_ctfb_mode_to_display_timing(mode, &timing);
        lcdc_tcon0_mode_set(lcdc, &timing, clk_div, for_ext_vga_dac,
                            sunxi_display.depth, CONFIG_VIDEO_LCD_DCLK_PHASE);
 }
@@ -689,7 +660,7 @@ static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,
                (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
        struct display_timing timing;
 
-       sunxi_ctfb_mode_to_display_timing(mode, &timing);
+       video_ctfb_mode_to_display_timing(mode, &timing);
        lcdc_tcon1_mode_set(lcdc, &timing, use_portd_hvsync,
                            sunxi_is_composite());