rockchip: pinctrl: rk3399: add support for I2C8

The RK3399 has a total of 9 I2C controllers.  To support these, the
enum in periph.h is extended and the mapping from the IRQ numbers to
the peripheral-ids is extended to ensure that pinctrl requests are
passed through to the function configuring the I2C pins.

For I2C8, the pinctrl is implemented and tested (on a RK3399-Q7) using
communication with the FAN53555 connected on I2C8.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index 8d21eb7bee7230a45d122a9916e977a665ac7ea0..b541e2caa1855bc6593bbbbdc557961da46b0b4f 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -589,7 +589,12 @@ enum {
        PMUGRF_GPIO1C3_SEL_SHIFT        = 6,
        PMUGRF_GPIO1C3_SEL_MASK = 3 << PMUGRF_GPIO1C3_SEL_SHIFT,
        PMUGRF_PWM_2            = 1,
-
+       PMUGRF_GPIO1C4_SEL_SHIFT = 8,
+       PMUGRF_GPIO1C4_SEL_MASK = 3 << PMUGRF_GPIO1C4_SEL_SHIFT,
+       PMUGRF_I2C8PMU_SDA = 1,
+       PMUGRF_GPIO1C5_SEL_SHIFT = 10,
+       PMUGRF_GPIO1C5_SEL_MASK = 3 << PMUGRF_GPIO1C5_SEL_SHIFT,
+       PMUGRF_I2C8PMU_SCL = 1,
 };
 
 /* GRF_SOC_CON5 */

diff --git a/arch/arm/include/asm/arch-rockchip/periph.h b/arch/arm/include/asm/arch-rockchip/periph.h
index 9f4bc2e107eacefe8596806e819fa6776d6bc5f5..77cf5b945009998c539815f6a902531b36cf24a8 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/periph.h
+++ b/arch/arm/include/asm/arch-rockchip/periph.h
@@ -24,6 +24,9 @@ enum periph_id {
        PERIPH_ID_I2C3,
        PERIPH_ID_I2C4,
        PERIPH_ID_I2C5,
+       PERIPH_ID_I2C6,
+       PERIPH_ID_I2C7,
+       PERIPH_ID_I2C8,
        PERIPH_ID_SPI0,
        PERIPH_ID_SPI1,
        PERIPH_ID_SPI2,

diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
index cab268c7d6c281ac9a214e63b014a5bb156eb224..19a741552203eb75924a587aa258291f47c9bc23 100644 (file)
--- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c
@@ -70,11 +70,21 @@ static void pinctrl_rk3399_i2c_config(struct rk3399_grf_regs *grf,
                             PMUGRF_GPIO1C0_SEL_MASK,
                             PMUGRF_I2C0PMU_SCL << PMUGRF_GPIO1C0_SEL_SHIFT);
                break;
+       case PERIPH_ID_I2C8:
+               rk_clrsetreg(&pmugrf->gpio1c_iomux,
+                            PMUGRF_GPIO1C4_SEL_MASK,
+                            PMUGRF_I2C8PMU_SDA << PMUGRF_GPIO1C4_SEL_SHIFT);
+               rk_clrsetreg(&pmugrf->gpio1c_iomux,
+                            PMUGRF_GPIO1C5_SEL_MASK,
+                            PMUGRF_I2C8PMU_SCL << PMUGRF_GPIO1C5_SEL_SHIFT);
+               break;
        case PERIPH_ID_I2C1:
        case PERIPH_ID_I2C2:
        case PERIPH_ID_I2C3:
        case PERIPH_ID_I2C4:
        case PERIPH_ID_I2C5:
+       case PERIPH_ID_I2C6:
+       case PERIPH_ID_I2C7:
        default:
                debug("i2c id = %d iomux error!\n", i2c_id);
                break;
@@ -301,6 +311,9 @@ static int rk3399_pinctrl_request(struct udevice *dev, int func, int flags)
        case PERIPH_ID_I2C3:
        case PERIPH_ID_I2C4:
        case PERIPH_ID_I2C5:
+       case PERIPH_ID_I2C6:
+       case PERIPH_ID_I2C7:
+       case PERIPH_ID_I2C8:
                pinctrl_rk3399_i2c_config(priv->grf, priv->pmugrf, func);
                break;
        case PERIPH_ID_SPI0:
@@ -375,6 +388,12 @@ static int rk3399_pinctrl_get_periph_id(struct udevice *dev,
                return PERIPH_ID_I2C4;
        case 38:
                return PERIPH_ID_I2C5;
+       case 37:
+               return PERIPH_ID_I2C6;
+       case 36:
+               return PERIPH_ID_I2C7;
+       case 58:
+               return PERIPH_ID_I2C8;
        case 65:
                return PERIPH_ID_SDMMC1;
 #if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)