/* mtime register */
#define MTIME_REG(base) ((ulong)(base))
-static int andes_plmt_get_count(struct udevice *dev, u64 *count)
+static u64 andes_plmt_get_count(struct udevice *dev)
{
- *count = readq((void __iomem *)MTIME_REG(dev->priv));
-
- return 0;
+ return readq((void __iomem *)MTIME_REG(dev->priv));
}
static const struct timer_ops andes_plmt_ops = {
return 0;
}
-static int sifive_clint_get_count(struct udevice *dev, u64 *count)
+static u64 sifive_clint_get_count(struct udevice *dev)
{
- *count = readq((void __iomem *)MTIME_REG(dev->priv));
-
- return 0;
+ return readq((void __iomem *)MTIME_REG(dev->priv));
}
static const struct timer_ops sifive_clint_ops = {
struct atftmr_timer_regs *regs;
};
-static int atftmr_timer_get_count(struct udevice *dev, u64 *count)
+static u64 atftmr_timer_get_count(struct udevice *dev)
{
struct atftmr_timer_platdata *plat = dev->platdata;
struct atftmr_timer_regs *const regs = plat->regs;
u32 val;
val = readl(®s->t3_counter);
- *count = timer_conv_64(val);
- return 0;
+ return timer_conv_64(val);
}
static int atftmr_timer_probe(struct udevice *dev)
struct altera_timer_regs *regs;
};
-static int altera_timer_get_count(struct udevice *dev, u64 *count)
+static u64 altera_timer_get_count(struct udevice *dev)
{
struct altera_timer_platdata *plat = dev->platdata;
struct altera_timer_regs *const regs = plat->regs;
/* Read timer value */
val = readl(®s->snapl) & 0xffff;
val |= (readl(®s->snaph) & 0xffff) << 16;
- *count = timer_conv_64(~val);
-
- return 0;
+ return timer_conv_64(~val);
}
static int altera_timer_probe(struct udevice *dev)
uint timer_id;
};
-static int arc_timer_get_count(struct udevice *dev, u64 *count)
+static u64 arc_timer_get_count(struct udevice *dev)
{
u32 val = 0;
struct arc_timer_priv *priv = dev_get_priv(dev);
val = read_aux_reg(ARC_AUX_TIMER1_CNT);
break;
}
- *count = timer_conv_64(val);
-
- return 0;
+ return timer_conv_64(val);
}
static int arc_timer_probe(struct udevice *dev)
return 0;
}
-static int ast_timer_get_count(struct udevice *dev, u64 *count)
+static u64 ast_timer_get_count(struct udevice *dev)
{
struct ast_timer_priv *priv = dev_get_priv(dev);
- *count = AST_TMC_RELOAD_VAL - readl(&priv->tmc->status);
-
- return 0;
+ return AST_TMC_RELOAD_VAL - readl(&priv->tmc->status);
}
static int ast_timer_ofdata_to_platdata(struct udevice *dev)
u32 *regs;
};
-static int atcpit_timer_get_count(struct udevice *dev, u64 *count)
+static u64 atcpit_timer_get_count(struct udevice *dev)
{
struct atcpit_timer_platdata *plat = dev_get_platdata(dev);
u32 val;
val = ~(REG32_TMR(CH_CNT(1))+0xffffffff);
- *count = timer_conv_64(val);
- return 0;
+ return timer_conv_64(val);
}
static int atcpit_timer_probe(struct udevice *dev)
struct atmel_pit_regs *regs;
};
-static int atmel_pit_get_count(struct udevice *dev, u64 *count)
+static u64 atmel_pit_get_count(struct udevice *dev)
{
struct atmel_pit_platdata *plat = dev_get_platdata(dev);
struct atmel_pit_regs *const regs = plat->regs;
u32 val = readl(®s->value_image);
- *count = timer_conv_64(val);
-
- return 0;
+ return timer_conv_64(val);
}
static int atmel_pit_probe(struct udevice *dev)
}
#endif
-static int cadence_ttc_get_count(struct udevice *dev, u64 *count)
+static u64 cadence_ttc_get_count(struct udevice *dev)
{
struct cadence_ttc_priv *priv = dev_get_priv(dev);
- *count = readl(&priv->regs->counter_val1);
-
- return 0;
+ return readl(&priv->regs->counter_val1);
}
static int cadence_ttc_probe(struct udevice *dev)
struct reset_ctl_bulk resets;
};
-static int dw_apb_timer_get_count(struct udevice *dev, u64 *count)
+static u64 dw_apb_timer_get_count(struct udevice *dev)
{
struct dw_apb_timer_priv *priv = dev_get_priv(dev);
* requires the count to be incrementing. Invert the
* result.
*/
- *count = timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
-
- return 0;
+ return timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
}
static int dw_apb_timer_probe(struct udevice *dev)
void __iomem *base;
};
-static int mchp_pit64b_get_count(struct udevice *dev, u64 *count)
+static u64 mchp_pit64b_get_count(struct udevice *dev)
{
struct mchp_pit64b_priv *priv = dev_get_priv(dev);
u32 lsb = readl(priv->base + MCHP_PIT64B_TLSBR);
u32 msb = readl(priv->base + MCHP_PIT64B_TMSBR);
- *count = ((u64)msb << 32) | lsb;
-
- return 0;
+ return ((u64)msb << 32) | lsb;
}
static int mchp_pit64b_probe(struct udevice *dev)
WATCHDOG_RESET();
}
-static int mpc83xx_timer_get_count(struct udevice *dev, u64 *count)
+static u64 mpc83xx_timer_get_count(struct udevice *dev)
{
u32 tbu, tbl;
tbl = mftb();
} while (tbu != mftbu());
- *count = (tbu * 0x10000ULL) + tbl;
-
- return 0;
+ return (tbu * 0x10000ULL) + tbl;
}
static int mpc83xx_timer_probe(struct udevice *dev)
void __iomem *base;
};
-static int mtk_timer_get_count(struct udevice *dev, u64 *count)
+static u64 mtk_timer_get_count(struct udevice *dev)
{
struct mtk_timer_priv *priv = dev_get_priv(dev);
u32 val = readl(priv->base + MTK_GPT4_CNT);
- *count = timer_conv_64(val);
-
- return 0;
+ return timer_conv_64(val);
}
static int mtk_timer_probe(struct udevice *dev)
struct nomadik_mtu_timer_regs *timer;
};
-static int nomadik_mtu_get_count(struct udevice *dev, u64 *count)
+static u64 nomadik_mtu_get_count(struct udevice *dev)
{
struct nomadik_mtu_priv *priv = dev_get_priv(dev);
/* Decrementing counter: invert the value */
- *count = timer_conv_64(~readl(&priv->timer->cv));
-
- return 0;
+ return timer_conv_64(~readl(&priv->timer->cv));
}
static int nomadik_mtu_probe(struct udevice *dev)
struct omap_gptimer_regs *regs;
};
-static int omap_timer_get_count(struct udevice *dev, u64 *count)
+static u64 omap_timer_get_count(struct udevice *dev)
{
struct omap_timer_priv *priv = dev_get_priv(dev);
- *count = timer_conv_64(readl(&priv->regs->tcrr));
-
- return 0;
+ return timer_conv_64(readl(&priv->regs->tcrr));
}
static int omap_timer_probe(struct udevice *dev)
fdt_addr_t regs;
};
-static int ostm_get_count(struct udevice *dev, u64 *count)
+static u64 ostm_get_count(struct udevice *dev)
{
struct ostm_priv *priv = dev_get_priv(dev);
- *count = timer_conv_64(readl(priv->regs + OSTM_CNT));
-
- return 0;
+ return timer_conv_64(readl(priv->regs + OSTM_CNT));
}
static int ostm_probe(struct udevice *dev)
#include <timer.h>
#include <asm/csr.h>
-static int riscv_timer_get_count(struct udevice *dev, u64 *count)
+static u64 riscv_timer_get_count(struct udevice *dev)
{
- if (IS_ENABLED(CONFIG_64BIT)) {
- *count = csr_read(CSR_TIME);
- } else {
- u32 hi, lo;
+ __maybe_unused u32 hi, lo;
- do {
- hi = csr_read(CSR_TIMEH);
- lo = csr_read(CSR_TIME);
- } while (hi != csr_read(CSR_TIMEH));
+ if (IS_ENABLED(CONFIG_64BIT))
+ return csr_read(CSR_TIME);
- *count = ((u64)hi << 32) | lo;
- }
+ do {
+ hi = csr_read(CSR_TIMEH);
+ lo = csr_read(CSR_TIME);
+ } while (hi != csr_read(CSR_TIMEH));
- return 0;
+ return ((u64)hi << 32) | lo;
}
static int riscv_timer_probe(struct udevice *dev)
}
#endif
-static int rockchip_timer_get_count(struct udevice *dev, u64 *count)
+static u64 rockchip_timer_get_count(struct udevice *dev)
{
struct rockchip_timer_priv *priv = dev_get_priv(dev);
uint64_t cntr = rockchip_timer_get_curr_value(priv->timer);
/* timers are down-counting */
- *count = ~0ull - cntr;
- return 0;
+ return ~0ull - cntr;
}
static int rockchip_clk_ofdata_to_platdata(struct udevice *dev)
return SANDBOX_TIMER_RATE;
}
-static notrace int sandbox_timer_get_count(struct udevice *dev, u64 *count)
+static notrace u64 sandbox_timer_get_count(struct udevice *dev)
{
- *count = timer_early_get_count();
-
- return 0;
+ return timer_early_get_count();
}
static int sandbox_timer_probe(struct udevice *dev)
struct globaltimer *global_timer;
};
-static int sti_timer_get_count(struct udevice *dev, u64 *count)
+static u64 sti_timer_get_count(struct udevice *dev)
{
struct sti_timer_priv *priv = dev_get_priv(dev);
struct globaltimer *global_timer = priv->global_timer;
old = high;
}
timer = high;
- *count = (u64)((timer << 32) | low);
-
- return 0;
+ return (u64)((timer << 32) | low);
}
static int sti_timer_probe(struct udevice *dev)
struct stm32_timer_regs *base;
};
-static int stm32_timer_get_count(struct udevice *dev, u64 *count)
+static u64 stm32_timer_get_count(struct udevice *dev)
{
struct stm32_timer_priv *priv = dev_get_priv(dev);
struct stm32_timer_regs *regs = priv->base;
- *count = readl(®s->cnt);
-
- return 0;
+ return readl(®s->cnt);
}
static int stm32_timer_probe(struct udevice *dev)
if (!ops->get_count)
return -ENOSYS;
- return ops->get_count(dev, count);
+ *count = ops->get_count(dev);
+ return 0;
}
unsigned long notrace timer_get_rate(struct udevice *dev)
#endif
}
-static int tsc_timer_get_count(struct udevice *dev, u64 *count)
+static u64 tsc_timer_get_count(struct udevice *dev)
{
u64 now_tick = rdtsc();
- *count = now_tick - gd->arch.tsc_base;
-
- return 0;
+ return now_tick - gd->arch.tsc_base;
}
static void tsc_timer_ensure_setup(bool early)
*
* @dev: The timer device
*
- * @count: pointer that returns the current 64-bit timer count
+ * This function may be called at any time after the driver is probed.
+ * All necessary initialization must be completed by the time probe()
+ * returns. The count returned by this functions should be monotonic.
+ * This function must succeed.
*
- * Return: 0 if OK, -ve on error
+ * Return: The current 64-bit timer count
*/
- int (*get_count)(struct udevice *dev, u64 *count);
+ u64 (*get_count)(struct udevice *dev);
};
/**