watchdog: designware: Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig

Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers
accordingly, no functional change. The S10 enables the WDT only in
SPL, but does not enable it in U-Boot itself, hence disable it in
the config again.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>

diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index c7286d551984ca332e94b0b4b5c916710e1ae4fb..a83d991f321119a6a4017140143c001f0cf129cd 100644 (file)
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -59,3 +59,4 @@ CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_DESIGNWARE_WATCHDOG=y

diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 5b2801bedad0c17412c2e02854ffb494de8953fa..85c458ae02dedc45216cc39f629bb7c6bbd23861 100644 (file)
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -97,3 +97,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 # CONFIG_SPL_WDT is not set
+CONFIG_DESIGNWARE_WATCHDOG=y

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 2b8064dfae0688761b58b5909d139778404fa031..c9987d42ff200ebc49d59c4341e3712f9a433f5b 100644 (file)
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -45,6 +45,13 @@ config ULP_WATCHDOG
        help
          Say Y here to enable i.MX7ULP watchdog driver.
 
+config DESIGNWARE_WATCHDOG
+       bool "Designware watchdog timer support"
+       select HW_WATCHDOG
+       help
+          Enable this to support Designware Watchdog Timer IP, present e.g.
+          on Altera SoCFPGA SoCs.
+
 config WDT
        bool "Enable driver model for watchdog timer drivers"
        depends on DM

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 05bfef75c0df1430ad4346363e24d99998ded0e9..8d10469e7c3dd2f70f892acf1cff141b009e8f49 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -104,11 +104,8 @@
 /*
  * L4 Watchdog
  */
-#ifdef CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
 #define CONFIG_DW_WDT_BASE             SOCFPGA_L4WD0_ADDRESS
 #define CONFIG_DW_WDT_CLOCK_KHZ                25000
-#endif
 
 /*
  * MMC Driver

diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 4afadafd35ac961ffef1e72f6b7ed0896b5673f0..ac7c00505580a08d3e3fd7ac90fce98fd9548d81 100644 (file)
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -152,7 +152,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  */
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#else
+#undef CONFIG_HW_WATCHDOG
+#undef CONFIG_DESIGNWARE_WATCHDOG
+#endif
 #define CONFIG_DW_WDT_BASE             SOCFPGA_L4WD0_ADDRESS
 #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
 #ifndef __ASSEMBLY__
@@ -162,7 +165,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
 #else
 #define CONFIG_DW_WDT_CLOCK_KHZ                100000
 #endif
-#endif
 
 /*
  * SPL memory layout

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index cbc95029ffbf65609f075ba56d2f36bee8c5de4b..874f268cb263143d4724414e23bbdf03342e7bfd 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -311,7 +311,6 @@ CONFIG_DEFAULT_IMMR
 CONFIG_DEF_HWCONFIG
 CONFIG_DELAY_ENVIRONMENT
 CONFIG_DESIGNWARE_ETH
-CONFIG_DESIGNWARE_WATCHDOG
 CONFIG_DEVELOP
 CONFIG_DEVICE_TREE_LIST
 CONFIG_DFU_ALT