mx51evk: Fix 2 hours reset issue

The mx51evk u-boot has an issue that system will get reset
every 2 hours.

MC13892 has an inside charge timer which expires in 120 minutes.
If ICHRG and CHGAUTOB are not set properly, this timer expiration
will get system power recycled.

Since mx51evk has no Li-Ion battery on board, the patch sets
ICHRG in externally powered mode and sets CHGAUTOB bit to avoid
automatic charging, so that system will not get reset by this
timer expiration.

The patch also corrects the bit field definition of register 48
(Charger 0) per latest MC13892 Reference Manual.

Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>

diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index c8d7d3964e3f368ba41e6faa92189c9fca843e88..0b58b1b332a71d15fcf01272472d99b803f24c45 100644 (file)
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -188,10 +188,10 @@ static void power_init(void)
        val &= ~PWGT2SPIEN;
        pmic_reg_write(REG_POWER_MISC, val);
 
-       /* Write needed to update Charger 0 */
-       pmic_reg_write(REG_CHARGE, VCHRG0 | VCHRG1 | VCHRG2 |
-               ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | ICHRGTR0 |
-               OVCTRL1 | UCHEN | CHRGLEDEN | CYCLB);
+       /* Externally powered */
+       val = pmic_reg_read(REG_CHARGE);
+       val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB;
+       pmic_reg_write(REG_CHARGE, val);
 
        /* power up the system first */
        pmic_reg_write(REG_POWER_MISC, PWUP);

diff --git a/include/mc13892.h b/include/mc13892.h
index 791e3ec878455460ef44a36f8708b4bc4f4e396f..61c3e6e621c4a59a9ae1c79f1abd730c70b21aa8 100644 (file)
--- a/include/mc13892.h
+++ b/include/mc13892.h
@@ -29,24 +29,24 @@
 
 /* REG_CHARGE */
 
-#define VCHRG0         0
+#define VCHRG0         (1 << 0)
 #define VCHRG1         (1 << 1)
 #define VCHRG2         (1 << 2)
 #define ICHRG0         (1 << 3)
 #define ICHRG1         (1 << 4)
 #define ICHRG2         (1 << 5)
 #define ICHRG3         (1 << 6)
-#define ICHRGTR0       (1 << 7)
-#define ICHRGTR1       (1 << 8)
-#define ICHRGTR2       (1 << 9)
+#define TREN           (1 << 7)
+#define ACKLPB         (1 << 8)
+#define THCHKB         (1 << 9)
 #define FETOVRD                (1 << 10)
 #define FETCTRL                (1 << 11)
 #define RVRSMODE       (1 << 13)
-#define OVCTRL0                (1 << 15)
-#define OVCTRL1                (1 << 16)
-#define UCHEN          (1 << 17)
+#define PLIM0          (1 << 15)
+#define PLIM1          (1 << 16)
+#define PLIMDIS                (1 << 17)
 #define CHRGLEDEN      (1 << 18)
-#define CHRGRAWPDEN    (1 << 19)
+#define CHGTMRRST      (1 << 19)
 #define CHGRESTART     (1 << 20)
 #define CHGAUTOB       (1 << 21)
 #define CYCLB          (1 << 22)