ARM: DRA7: Add macros for voltage values for all OPPs

Define specific macros for the voltage values for all voltage
domains for all applicable OPPs - OPP_NOM, OPP_OD and OPP_HIGH.
No separate macros are defined for VD_MPU and VD_CORE at OPP_OD
and OPP_HIGH as these use the same values as OPP_NOM.

The current macros will be used as common macros that can be
redefined appropriately based on a selected OPP configuration
at build time.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index 8c121d6aa54d1cd66ce8efebc5fc50f512375d3e..551c9277f2a74fa3a0c8e050a4987d690f6b1fb6 100644 (file)
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -240,11 +240,21 @@
 #define VDD_MM_ES2_LOW 880
 
 /* DRA74x/75x/72x voltage settings in mv for OPP_NOM per DM */
-#define VDD_MPU_DRA7           1150
-#define VDD_CORE_DRA7          1150
-#define VDD_EVE_DRA7           1060
-#define VDD_GPU_DRA7           1060
-#define VDD_IVA_DRA7           1060
+#define VDD_MPU_DRA7_NOM       1150
+#define VDD_CORE_DRA7_NOM      1150
+#define VDD_EVE_DRA7_NOM       1060
+#define VDD_GPU_DRA7_NOM       1060
+#define VDD_IVA_DRA7_NOM       1060
+
+/* DRA74x/75x/72x voltage settings in mv for OPP_OD per DM */
+#define VDD_EVE_DRA7_OD                1150
+#define VDD_GPU_DRA7_OD                1150
+#define VDD_IVA_DRA7_OD                1150
+
+/* DRA74x/75x/72x voltage settings in mv for OPP_HIGH per DM */
+#define VDD_EVE_DRA7_HIGH      1250
+#define VDD_GPU_DRA7_HIGH      1250
+#define VDD_IVA_DRA7_HIGH      1250
 
 /* Efuse register offsets for DRA7xx platform */
 #define DRA752_EFUSE_BASE      0x4A002000
@@ -276,7 +286,14 @@
 /* STD_FUSE_OPP_VMIN_MPU_4 */
 #define STD_FUSE_OPP_VMIN_MPU_HIGH     (DRA752_EFUSE_BASE + 0x1B28)
 
-/* Common Efuse register macros */
+/* Common voltage and Efuse register macros */
+/* DRA74x/DRA75x/DRA72x */
+#define VDD_MPU_DRA7                   VDD_MPU_DRA7_NOM
+#define VDD_CORE_DRA7                  VDD_CORE_DRA7_NOM
+#define VDD_EVE_DRA7                   VDD_EVE_DRA7_NOM
+#define VDD_GPU_DRA7                   VDD_GPU_DRA7_NOM
+#define VDD_IVA_DRA7                   VDD_IVA_DRA7_NOM
+
 #define STD_FUSE_OPP_VMIN_MPU          STD_FUSE_OPP_VMIN_MPU_NOM
 #define STD_FUSE_OPP_VMIN_CORE         STD_FUSE_OPP_VMIN_CORE_NOM
 #define STD_FUSE_OPP_VMIN_DSPEVE       STD_FUSE_OPP_VMIN_DSPEVE_NOM