ARM: qemu-arm: Fix qemu_arm64_defconfig for QEMU 3.0

QEMU 3.0 introduced additional memory-mapped regions for PCI-E ECAM and
MMIO. Thus we need to add them to our MMU map or U-Boot will crash with
a Synchronous Abort during PCI-E probing when it tries to access the
unmapped ECAM memory area.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Tested-by: Jonathan Gray <jsg@jsg.id.au>

diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index 1f5a33d520bd159e9368ffccd196ed1b2373904e..812c90636d7cc59a5581558f8f8791b1dd9a0525 100644 (file)
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -17,7 +17,7 @@ static struct mm_region qemu_arm64_mem_map[] = {
                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
                         PTE_BLOCK_INNER_SHARE
        }, {
-               /* Peripherals */
+               /* Lowmem peripherals */
                .virt = 0x08000000UL,
                .phys = 0x08000000UL,
                .size = 0x38000000,
@@ -31,6 +31,22 @@ static struct mm_region qemu_arm64_mem_map[] = {
                .size = 255UL * SZ_1G,
                .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
                         PTE_BLOCK_INNER_SHARE
+       }, {
+               /* Highmem PCI-E ECAM memory area */
+               .virt = 0x4010000000ULL,
+               .phys = 0x4010000000ULL,
+               .size = 0x10000000,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* Highmem PCI-E MMIO memory area */
+               .virt = 0x8000000000ULL,
+               .phys = 0x8000000000ULL,
+               .size = 0x8000000000ULL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
        }, {
                /* List terminator */
                0,