riscv: Merge unnecessary SMP ifdefs in start.S

Two consecutive SMP ifdefs blocks can be combined into one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 6b3ff99c3882e9b4d30009842a0e14a09ff6ee81..ecf0482635b07fc410cac94dd4c0d4c375a93e61 100644 (file)
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -58,9 +58,7 @@ _start:
        /* tp: hart id */
        li      t0, CONFIG_NR_CPUS
        bge     tp, t0, hart_out_of_bounds_loop
-#endif
 
-#ifdef CONFIG_SMP
        /* set xSIE bit to receive IPIs */
 #if CONFIG_IS_ENABLED(RISCV_MMODE)
        li      t0, MIE_MSIE
@@ -377,9 +375,7 @@ hart_out_of_bounds_loop:
        /* Harts in this loop are out of bounds, increase CONFIG_NR_CPUS. */
        wfi
        j       hart_out_of_bounds_loop
-#endif
 
-#ifdef CONFIG_SMP
 /* SMP relocation entry */
 secondary_hart_relocate:
        /* a1: new sp */