{
const struct mbus_dram_target_info *dram;
- printf("MVEBU XHCI INIT controller @ 0x%lx\n", base);
+ printf("MVEBU XHCI INIT controller @ 0x%llx\n", (fdt64_t)base);
dram = mvebu_mbus_dram_info();
xhci_mvebu_mbus_config((void __iomem *)base, dram);
offs = priv->offs[0].start + clk->id;
err = clk_ti_ctrl_check_offs(clk, offs);
if (err) {
- dev_err(clk->dev, "invalid offset: 0x%lx\n", offs);
+ dev_err(clk->dev, "invalid offset: 0x%llx\n", (fdt64_t)offs);
return err;
}
offs = priv->offs[0].start + clk->id;
err = clk_ti_ctrl_check_offs(clk, offs);
if (err) {
- dev_err(clk->dev, "invalid offset: 0x%lx\n", offs);
+ dev_err(clk->dev, "invalid offset: 0x%llx\n", (fdt64_t)offs);
return err;
}
}
priv->offs[i].end = priv->offs[i].start + fdt_size;
- dev_dbg(dev, "start=0x%08lx, end=0x%08lx\n",
- priv->offs[i].start, priv->offs[i].end);
+ dev_dbg(dev, "start=0x%016llx, end=0x%016llx\n",
+ (fdt64_t)priv->offs[i].start,
+ (fdt64_t)priv->offs[i].end);
}
return 0;
phy_id = ofnode_read_u32_default(node, "reg", FDT_ADDR_T_NONE);
if (phy_id >= MAX_PHYS) {
- dev_err(dev, "invalid reg value %lx for %s\n",
- phy_id, ofnode_get_name(node));
+ dev_err(dev, "invalid reg value %llx for %s\n",
+ (fdt64_t)phy_id, ofnode_get_name(node));
return -ENOENT;
}