arm: rmobile: Add SH QSPI base register address

This adds base register address of SH QSPI.
Currently, SH QSPI is used only from R8A7790 and R8A7791.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

diff --git a/arch/arm/include/asm/arch-rmobile/r8a7790.h b/arch/arm/include/asm/arch-rmobile/r8a7790.h
index 42d65d356dac55a03a194c95ea5879c6c15e4f2b..d9ea71fa14f8c4f5ac9729caba584b2865ecce5f 100644 (file)
--- a/arch/arm/include/asm/arch-rmobile/r8a7790.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7790.h
@@ -19,6 +19,7 @@
 #define DBSC3_1_BASE           0xE67A0000
 #define TMU_BASE               0xE61E0000
 #define        GPIO5_BASE              0xE6055000
+#define SH_QSPI_BASE   0xE6B10000
 
 #define S3C_BASE               0xE6784000
 #define S3C_INT_BASE           0xE6784A00

diff --git a/arch/arm/include/asm/arch-rmobile/r8a7791.h b/arch/arm/include/asm/arch-rmobile/r8a7791.h
index 2afda0a62f70cccd38de4332b1ff388c31bc118e..ff30180591459d4b25b402d0839ba01cf05539dd 100644 (file)
--- a/arch/arm/include/asm/arch-rmobile/r8a7791.h
+++ b/arch/arm/include/asm/arch-rmobile/r8a7791.h
@@ -19,6 +19,7 @@
 #define DBSC3_1_BASE   0xE67A0000
 #define TMU_BASE       0xE61E0000
 #define        GPIO5_BASE      0xE6055000
+#define SH_QSPI_BASE   0xE6B10000
 
 #define S3C_BASE       0xE6784000
 #define S3C_INT_BASE   0xE6784A00