arm64: zynqmp: Disable Tri-state for MIO38 Pin

gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state 
is enabled for MIO38, causing inappropriate PHY register reads.

Disabled Tri-state for MIO38 to make HW reset work.

Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540

Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20231020050622.972750-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
index 22e7d68d02b3fae9854b7a52536b9e975123f157..c4f1da92186fcca1c16237390bfebb398cdcc420 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso
@@ -190,6 +190,25 @@
 &pinctrl0 {
        status = "okay";
 
+       pinctrl_gpio0_default: gpio0-default {
+                conf {
+                        groups = "gpio0_38_grp";
+                        bias-pull-up;
+                        power-source = <IO_STANDARD_LVCMOS18>;
+                };
+
+                mux {
+                        groups = "gpio0_38_grp";
+                        function = "gpio0";
+                };
+
+                conf-tx {
+                        pins = "MIO38";
+                        bias-disable;
+                        output-enable;
+                };
+        };
+
        pinctrl_uart1_default: uart1-default {
                conf {
                        groups = "uart1_9_grp";
@@ -345,6 +364,12 @@
        };
 };
 
+&gpio {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_gpio0_default>;
+};
+
 &uart1 {
        status = "okay";
        pinctrl-names = "default";

diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
index eadc2563064b4ec3c24cb94b1f3e32faad8abc69..6c5e0e5660615df036a1b1eb0bc56ce7a4207b8b 100644 (file)
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso
@@ -178,6 +178,25 @@
 &pinctrl0 {
        status = "okay";
 
+       pinctrl_gpio0_default: gpio0-default {
+               conf {
+                       groups = "gpio0_38_grp";
+                       bias-pull-up;
+                       power-source = <IO_STANDARD_LVCMOS18>;
+               };
+
+               mux {
+                       groups = "gpio0_38_grp";
+                       function = "gpio0";
+               };
+
+               conf-tx {
+                       pins = "MIO38";
+                       bias-disable;
+                       output-enable;
+               };
+       };
+
        pinctrl_uart1_default: uart1-default {
                conf {
                        groups = "uart1_9_grp";
@@ -333,6 +352,12 @@
        };
 };
 
+&gpio {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpio0_default>;
+};
+
 &uart1 {
        status = "okay";
        pinctrl-names = "default";