arm64: versal-net: Add DTSes for mini qspi/ospi configuration

Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a99a8d72201a782fc811715942dea97fb5ab583b.1698329087.git.michal.simek@amd.com

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6308c5c28f8e029339b6ab1fd0a40139d8b2af39..9e8b2087ce166cd9be9c4c7bb576830717df602c 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -493,7 +493,14 @@ dtb-$(CONFIG_ARCH_VERSAL_NET) += \
        versal-net-mini.dtb \
        versal-net-mini-emmc.dtb \
        versal-net-mini-ospi-single.dtb \
+       versal-net-mini-ospi-stacked.dtb \
        versal-net-mini-qspi-single.dtb \
+       versal-net-mini-qspi-parallel.dtb \
+       versal-net-mini-qspi-stacked.dtb \
+       versal-net-mini-qspi-x1-single.dtb \
+       versal-net-mini-qspi-x1-stacked.dtb \
+       versal-net-mini-qspi-x2-single.dtb \
+       versal-net-mini-qspi-x2-stacked.dtb \
        xilinx-versal-net-virt.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
        zynqmp-r5.dtb

diff --git a/arch/arm/dts/versal-net-mini-ospi-stacked.dts b/arch/arm/dts/versal-net-mini-ospi-stacked.dts
new file mode 100644 (file)
index 0000000..4bc954a
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-ospi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET OSPI Quad Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-ospi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI OSPI STACKED";
+};
+
+&ospi {
+       num-cs = <2>;
+};
+
+&flash0 {
+       reg = <0>, <1>;
+       stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+       spi-rx-bus-width = <8>;
+};

diff --git a/arch/arm/dts/versal-net-mini-qspi-parallel.dts b/arch/arm/dts/versal-net-mini-qspi-parallel.dts
new file mode 100644 (file)
index 0000000..edc2311
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-parallel.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI Quad Parallel DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI QSPI PARALLEL";
+};
+
+&qspi {
+       num-cs = <2>;
+};
+
+&flash0 {
+       reg = <0>, <1>;
+       parallel-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+       spi-rx-bus-width = <4>;
+};

diff --git a/arch/arm/dts/versal-net-mini-qspi-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-stacked.dts
new file mode 100644 (file)
index 0000000..920eed2
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-stacked.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI Quad Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI QSPI STACKED";
+};
+
+&qspi {
+       num-cs = <2>;
+};
+
+&flash0 {
+       reg = <0>, <1>;
+       stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+       spi-rx-bus-width = <4>;
+};

diff --git a/arch/arm/dts/versal-net-mini-qspi-x1-single.dts b/arch/arm/dts/versal-net-mini-qspi-x1-single.dts
new file mode 100644 (file)
index 0000000..856c79c
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x1-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x1 Single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI QSPI X1 SINGLE";
+};
+
+&flash0 {
+       spi-tx-bus-width = <1>;
+       spi-rx-bus-width = <1>;
+};

diff --git a/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts
new file mode 100644 (file)
index 0000000..5f74d98
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x1-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x1 Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI QSPI X1 STACKED";
+};
+
+&qspi {
+       num-cs = <2>;
+};
+
+&flash0 {
+       reg = <0>, <1>;
+       stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+       spi-tx-bus-width = <1>;
+       spi-rx-bus-width = <1>;
+};

diff --git a/arch/arm/dts/versal-net-mini-qspi-x2-single.dts b/arch/arm/dts/versal-net-mini-qspi-x2-single.dts
new file mode 100644 (file)
index 0000000..6ceaa24
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x2-single.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x2 Single DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI QSPI X2 SINGLE";
+};
+
+&flash0 {
+       spi-tx-bus-width = <2>;
+       spi-rx-bus-width = <2>;
+};

diff --git a/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts b/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts
new file mode 100644 (file)
index 0000000..5f4d0b5
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-qspi-x2-stacked.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Xilinx Versal NET QSPI x2 Stacked DTS
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ */
+
+#include "versal-net-mini-qspi.dtsi"
+
+/ {
+       model = "Xilinx Versal NET MINI QSPI X2 STACKED";
+};
+
+&qspi {
+       num-cs = <2>;
+};
+
+&flash0 {
+       reg = <0>, <1>;
+       stacked-memories = /bits/ 64 <0x8000000 0x8000000>; /* 128MB */
+       spi-tx-bus-width = <2>;
+       spi-rx-bus-width = <2>;
+};