board: freescale: p1_p2_rdb_pc: Avoid usage of CPLD's system reset register

CPLD's system reset register is buggy and requires workaround in U-Boot.
So use this kind of board reset only when there is no other reset option.

Introduce a new board_reset_last() callback which is last-stage
board-specific reset and implement CPLD's system reset in this new
board_reset_last() callback instead of board_reset() callback.

Fixes: 20fb58fc5a1c ("board: freescale: p1_p2_rdb_pc: Implement board_reset()")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 1b6cdc4df020fb51d23e4b5feac03392ce0d8076..3a503b9b4f2c18642f8e6d2015ddc9dc772cd315 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -45,6 +45,7 @@ __board_reset(void)
        /* Do nothing */
 }
 void board_reset(void) __attribute__((weak, alias("__board_reset")));
+void board_reset_last(void) __attribute__((weak, alias("__board_reset")));
 
 int checkcpu (void)
 {
@@ -325,6 +326,9 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
        /* Next try asserting HRESET_REQ */
        out_be32(&gur->rstcr, 0x2);
        udelay(100);
+
+       /* Attempt last-stage board-specific reset */
+       board_reset_last();
 #endif
 
        return 1;

diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 4c0e41f987f3cbc7d5610e3a5e86910016879da2..e690fb4fbceae156d4acffea0806c3b7462a4db7 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -83,7 +83,7 @@ struct cpld_data {
 #define CPLD_FXS_LED   0x0F
 #define CPLD_SYS_RST   0x00
 
-void board_reset(void)
+void board_reset_last(void)
 {
        struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
        out_8(&cpld_data->system_rst, 1);