AT91: add header file for the Shutdown Controller

and SHDWN address entry in at91sam9260.h

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>

diff --git a/arch/arm/include/asm/arch-at91/at91_shdwn.h b/arch/arm/include/asm/arch-at91/at91_shdwn.h
new file mode 100644 (file)
index 0000000..874f988
--- /dev/null
+++ b/arch/arm/include/asm/arch-at91/at91_shdwn.h
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2010
+ * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
+ *
+ * Shutdown Controller
+ * Based on AT91SAM9XE datasheet
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef AT91_SHDWN_H
+#define AT91_SHDWN_H
+
+#ifndef __ASSEMBLY__
+
+struct at91_shdwn {
+       u32     cr;     /* Control Rer.    WO */
+       u32     mr;     /* Mode Register   RW 0x00000003 */
+       u32     sr;     /* Status Register RO 0x00000000 */
+};
+
+#endif /* __ASSEMBLY__ */
+
+#define AT91_SHDW_CR_KEY       0xa5000000
+#define AT91_SHDW_CR_SHDW      0x00000001
+
+#define AT91_SHDW_MR_RTTWKEN   0x00010000
+#define AT91_SHDW_MR_CPTWK0    0x000000f0
+#define AT91_SHDW_MR_WKMODE0H2L        0x00000002
+#define AT91_SHDW_MR_WKMODE0L2H        0x00000001
+
+#define AT91_SHDW_SR_RTTWK     0x00010000
+#define AT91_SHDW_SR_WAKEUP0   0x00000001
+
+#endif

diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index cb34a94a3b396d4f21a3a4aa8f404c6085c2dc96..7fd60b74ffac993866c47d2dc4aea1d80fc8fac6 100644 (file)
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -56,6 +56,7 @@
 #define AT91_PIO_BASE          0xfffff400
 #define AT91_PMC_BASE          0xfffffc00
 #define AT91_RSTC_BASE         0xfffffd00
+#define AT91_SHDWN_BASE                0xfffffd10
 #define AT91_RTT_BASE          0xfffffd20
 #define AT91_PIT_BASE          0xfffffd30
 #define AT91_WDT_BASE          0xfffffd40