mpc83xx: Migrate CONFIG_LCRR_* to Kconfig

Migrate the CONFIG_LCRR_* settings to Kconfig.

Signed-off-by: Mario Six <mario.six@gdsys.cc>

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 59faa78d24cb1fec878dcd19328afa810626deef..af8facad534d17099f81c0c561009f89e58ca336 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -127,28 +127,6 @@ void cpu_init_f (volatile immap_t * im)
 #endif
 #ifdef CONFIG_SYS_SCCR_SATACM /* SATA controller clock mode */
                (CONFIG_SYS_SCCR_SATACM << SCCR_SATACM_SHIFT) |
-#endif
-               0;
-       __be32 lcrr_mask =
-#ifdef CONFIG_SYS_LCRR_DBYP /* PLL bypass */
-               LCRR_DBYP |
-#endif
-#ifdef CONFIG_SYS_LCRR_EADC /* external address delay */
-               LCRR_EADC |
-#endif
-#ifdef CONFIG_SYS_LCRR_CLKDIV /* system clock divider */
-               LCRR_CLKDIV |
-#endif
-               0;
-       __be32 lcrr_val =
-#ifdef CONFIG_SYS_LCRR_DBYP /* PLL bypass */
-               CONFIG_SYS_LCRR_DBYP |
-#endif
-#ifdef CONFIG_SYS_LCRR_EADC
-               CONFIG_SYS_LCRR_EADC |
-#endif
-#ifdef CONFIG_SYS_LCRR_CLKDIV /* system clock divider */
-               CONFIG_SYS_LCRR_CLKDIV |
 #endif
                0;
 

diff --git a/arch/powerpc/cpu/mpc83xx/initreg/Kconfig b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig
index 82c24891784f7f262aaee1ca22bf4876e2601153..a6b42a29af267e0f0255f821e8e53a4ebafe5ca0 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/initreg/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig
@@ -1,5 +1,6 @@
 menu "Initial register configuration"
 
 source "arch/powerpc/cpu/mpc83xx/initreg/Kconfig.spcr"
+source "arch/powerpc/cpu/mpc83xx/initreg/Kconfig.lcrr"
 
 endmenu

diff --git a/arch/powerpc/cpu/mpc83xx/initreg/Kconfig.lcrr b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig.lcrr
new file mode 100644 (file)
index 0000000..e6b6130
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/initreg/Kconfig.lcrr
@@ -0,0 +1,139 @@
+menu "LCRR - Clock Ratio Register register"
+
+if !ARCH_MPC8309 && !ARCH_MPC831X && !ARCH_MPC832X
+
+choice
+       prompt "DLL bypass"
+
+config LCRR_DBYP_UNSET
+       bool "Don't set value"
+
+config LCRR_DBYP_PLL_ENABLED
+       bool "PLL enabled"
+
+config LCRR_DBYP_PLL_BYPASSED
+       bool "PLL bypassed"
+
+endchoice
+
+endif
+
+if ARCH_MPC834X || ARCH_MPC8360
+
+choice
+       prompt "Additional delay cycles for SDRAM control signals"
+
+config LCRR_BUFCMDC_UNSET
+       bool "Don't set value"
+
+config LCRR_BUFCMDC_4
+       bool "4"
+
+config LCRR_BUFCMDC_1
+       bool "1"
+
+config LCRR_BUFCMDC_2
+       bool "2"
+
+config LCRR_BUFCMDC_3
+       bool "3"
+
+endchoice
+
+choice
+       prompt "Extended CAS latency"
+
+config LCRR_ECL_UNSET
+       bool "Don't set value"
+
+config LCRR_ECL_4
+       bool "4"
+
+config LCRR_ECL_5
+       bool "5"
+
+config LCRR_ECL_6
+       bool "6"
+
+config LCRR_ECL_7
+       bool "7"
+
+endchoice
+
+endif # ARCH_MPC834X || ARCH_MPC8360
+
+if !ARCH_MPC8308
+
+choice
+       prompt "External address delay cycles"
+
+config LCRR_EADC_UNSET
+       bool "Don't set value"
+
+config LCRR_EADC_4
+       bool "4"
+
+config LCRR_EADC_1
+       bool "1"
+
+config LCRR_EADC_2
+       bool "2"
+
+config LCRR_EADC_3
+       bool "3"
+
+endchoice
+
+endif # !ARCH_MPC8308
+
+choice
+       prompt "System clock divider"
+
+config LCRR_CLKDIV_UNSET
+       bool "Don't set value"
+
+config LCRR_CLKDIV_2
+       bool "2"
+
+config LCRR_CLKDIV_4
+       bool "4"
+
+config LCRR_CLKDIV_8
+       bool "8"
+
+endchoice
+
+config LCRR_DBYP
+       hex
+       default 0x0 if LCRR_DBYP_UNSET || LCRR_DBYP_PLL_ENABLED
+       default 0x80000000 if LCRR_DBYP_PLL_BYPASSED
+
+config LCRR_BUFCMDC
+       hex
+       default 0x0 if LCRR_BUFCMDC_4 || LCRR_BUFCMDC_UNSET
+       default 0x10000000 if LCRR_BUFCMDC_1
+       default 0x20000000 if LCRR_BUFCMDC_2
+       default 0x30000000 if LCRR_BUFCMDC_3
+
+config LCRR_ECL
+       hex
+       default 0x0 if LCRR_ECL_4 || LCRR_ECL_UNSET
+       default 0x1000000 if LCRR_ECL_5
+       default 0x2000000 if LCRR_ECL_6
+       default 0x3000000 if LCRR_ECL_7
+
+config LCRR_EADC
+       hex
+       default 0x0 if LCRR_EADC_4 || LCRR_EADC_UNSET
+       default 0x10000 if LCRR_EADC_1
+       default 0x20000 if LCRR_EADC_2
+       default 0x30000 if LCRR_EADC_3
+
+config LCRR_CLKDIV
+       hex
+       default 0x0 if LCRR_CLKDIV_UNSET
+       default 0x2 if LCRR_CLKDIV_2
+       default 0x4 if LCRR_CLKDIV_4
+       default 0x8 if LCRR_CLKDIV_8
+
+endmenu

diff --git a/arch/powerpc/cpu/mpc83xx/initreg/initreg.h b/arch/powerpc/cpu/mpc83xx/initreg/initreg.h
index d61c70f1fa6c4bd59aca5b1cbf70ec48195fa317..63aa5c946696ee0368bb3453b40ff0110f0fbcfd 100644 (file)
--- a/arch/powerpc/cpu/mpc83xx/initreg/initreg.h
+++ b/arch/powerpc/cpu/mpc83xx/initreg/initreg.h
@@ -39,5 +39,41 @@
 #endif
 #if defined(CONFIG_SPCR_TSEC2EP) && !defined(CONFIG_SPCR_TSEC2EP_UNSET)
                CONFIG_SPCR_TSEC2EP |
+#endif
+               0;
+
+       const __be32 lcrr_mask =
+#if defined(CONFIG_LCRR_DBYP) && !defined(CONFIG_LCRR_DBYP_UNSET)
+               LCRR_DBYP |
+#endif
+#if defined(CONFIG_LCRR_BUFCMDC) && !defined(CONFIG_LCRR_BUFCMDC_UNSET)
+               LCRR_BUFCMDC |
+#endif
+#if defined(CONFIG_LCRR_ECL) && !defined(CONFIG_LCRR_ECL_UNSET)
+               LCRR_ECL |
+#endif
+#if defined(CONFIG_LCRR_EADC) && !defined(CONFIG_LCRR_EADC_UNSET)
+               LCRR_EADC |
+#endif
+#if defined(CONFIG_LCRR_CLKDIV) && !defined(CONFIG_LCRR_CLKDIV_UNSET)
+               LCRR_CLKDIV |
+#endif
+               0;
+
+       const __be32 lcrr_val =
+#if defined(CONFIG_LCRR_DBYP) && !defined(CONFIG_LCRR_DBYP_UNSET)
+               CONFIG_LCRR_DBYP |
+#endif
+#if defined(CONFIG_LCRR_BUFCMDC) && !defined(CONFIG_LCRR_BUFCMDC_UNSET)
+               CONFIG_LCRR_BUFCMDC |
+#endif
+#if defined(CONFIG_LCRR_ECL) && !defined(CONFIG_LCRR_ECL_UNSET)
+               CONFIG_LCRR_ECL |
+#endif
+#if defined(CONFIG_LCRR_EADC) && !defined(CONFIG_LCRR_EADC_UNSET)
+               CONFIG_LCRR_EADC |
+#endif
+#if defined(CONFIG_LCRR_CLKDIV) && !defined(CONFIG_LCRR_CLKDIV_UNSET)
+               CONFIG_LCRR_CLKDIV |
 #endif
                0;

diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index a01ff8920b3683c67892eedde2c375083b58b116..1a38ebd549242915036bbc80b297b02d05c43cfd 100644 (file)
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -73,6 +73,8 @@ CONFIG_SICR_TMSOBI2_2_5_V=y
 CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
 CONFIG_SPCR_TSECEP_3=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y

diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index b368aee9663ab818471d4fd03021bb089e5f98af..04eb29ab9eb8c284f129534c329e4c81e1c07a69 100644 (file)
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -159,3 +159,5 @@ CONFIG_OR2_SETA_EXTERNAL=y
 CONFIG_OR2_XACS_EXTENDED=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index ddf9060df42afebccf4a7f432dbb0a24c4180439..8bbeb9777840015bdbfc183a42f5d3e7ede09dee 100644 (file)
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -158,3 +158,5 @@ CONFIG_OR2_SETA_EXTERNAL=y
 CONFIG_OR2_XACS_EXTENDED=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index 7c16364d3fc1f0954022707cdb8c2452900e8f92..29b12d004027711c3a5d5437cf435e41e11f8e0d 100644 (file)
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -167,3 +167,5 @@ CONFIG_OR2_SETA_EXTERNAL=y
 CONFIG_OR2_XACS_EXTENDED=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index ab8e315e0d6f06f0cebc002dc1af066a0ea3d5ba..2dc31edccb29da7d2888410d7d4d6e3b6fd2b12e 100644 (file)
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -166,3 +166,5 @@ CONFIG_OR2_SETA_EXTERNAL=y
 CONFIG_OR2_XACS_EXTENDED=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index e5e1b7a29d793a09ce3d6fd3e455db5e3b19234e..08b5cc50861fd0f88507e93b9b7c70e383e13fee 100644 (file)
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -143,3 +143,5 @@ CONFIG_OR1_CHT_TWO_CLOCK=y
 CONFIG_OR1_CSCT_8_CYCLE=y
 CONFIG_OR1_CST_ONE_CLOCK=y
 CONFIG_OR1_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig
index 08486f81a74806873e82028da895312c44cff5b3..8ea942d7d9fb9c8d7f60d0dfb709ad80f1c21b2a 100644 (file)
--- a/configs/MPC8323ERDB_defconfig
+++ b/configs/MPC8323ERDB_defconfig
@@ -108,3 +108,5 @@ CONFIG_OR0_XACS_EXTENDED=y
 CONFIG_OR0_XAM_SET=y
 CONFIG_OR0_TRLX_RELAXED=y
 CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig
index 807d3e391a3739f7600a9da7856de23e51f116e1..c39f449da9b1578600b553bb3ee9da1ed1d81c1c 100644 (file)
--- a/configs/MPC832XEMDS_ATM_defconfig
+++ b/configs/MPC832XEMDS_ATM_defconfig
@@ -143,3 +143,5 @@ CONFIG_OR3_XACS_EXTENDED=y
 CONFIG_OR3_XAM_SET=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig
index e328deb9fe42840a19153e915e955242b79cb8e4..0e65d21bdbf3674a680c8b8180ca1c28fe376a90 100644 (file)
--- a/configs/MPC832XEMDS_HOST_33_defconfig
+++ b/configs/MPC832XEMDS_HOST_33_defconfig
@@ -163,3 +163,5 @@ CONFIG_OR3_XACS_EXTENDED=y
 CONFIG_OR3_XAM_SET=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig
index d5bf354eeca79fe778a2053f76dd869b8dc7948f..472384fa140cd5844963f5b2bd3fd1fb9cfdac73 100644 (file)
--- a/configs/MPC832XEMDS_HOST_66_defconfig
+++ b/configs/MPC832XEMDS_HOST_66_defconfig
@@ -163,3 +163,5 @@ CONFIG_OR3_XACS_EXTENDED=y
 CONFIG_OR3_XAM_SET=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig
index 9d9d905118934860df4e149cc6253cb1f998d4d7..ec8a94cd2ab2ad12ad8e2a19eb6063ddce597fee 100644 (file)
--- a/configs/MPC832XEMDS_SLAVE_defconfig
+++ b/configs/MPC832XEMDS_SLAVE_defconfig
@@ -160,3 +160,5 @@ CONFIG_OR3_XACS_EXTENDED=y
 CONFIG_OR3_XAM_SET=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig
index 518f7114d790c593b9a909999ef5e91c42f983b5..8a26001f7f6255bb0075a67f5352218fa980a5e5 100644 (file)
--- a/configs/MPC832XEMDS_defconfig
+++ b/configs/MPC832XEMDS_defconfig
@@ -142,3 +142,5 @@ CONFIG_OR3_XACS_EXTENDED=y
 CONFIG_OR3_XAM_SET=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig
index fa646f543fb68aa93c129181d84af19a712216c3..35b394ba6afe4c1b0024667855ab76059e1e5f39 100644 (file)
--- a/configs/MPC8349EMDS_PCI64_defconfig
+++ b/configs/MPC8349EMDS_PCI64_defconfig
@@ -104,3 +104,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_15=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8349EMDS_SDRAM_defconfig b/configs/MPC8349EMDS_SDRAM_defconfig
index 8589470b2e395f5d69ba55e9ee427edb23a056c3..936458a441afd19d34dda863530f4018a4061301 100644 (file)
--- a/configs/MPC8349EMDS_SDRAM_defconfig
+++ b/configs/MPC8349EMDS_SDRAM_defconfig
@@ -113,3 +113,5 @@ CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_MPC8XXX_SPI=y
 CONFIG_OF_LIBFDT=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig
index 8af1a3d3b26e0ccfe9a7e1c3eea4755edafdef23..9649967bf0b5c4e77d40ecebbe4d69da99c4521f 100644 (file)
--- a/configs/MPC8349EMDS_SLAVE_defconfig
+++ b/configs/MPC8349EMDS_SLAVE_defconfig
@@ -104,3 +104,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_15=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index b2b944a30dad7ecde08d25e686ce6ea750d8e3df..bb0d166e4df23470577ec06d442f88f3c63f12c3 100644 (file)
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -107,3 +107,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_15=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index fcd78338c9077bfa71387bf398a7cd5f8d551709..eddb72b1e04bc5f40b96ac24ae3d286d9b289abd 100644 (file)
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -178,3 +178,5 @@ CONFIG_BR3_MACHINE_UPMA=y
 CONFIG_BR3_PORTSIZE_16BIT=y
 CONFIG_OR3_AM_32_KBYTES=y
 CONFIG_OR3_BI_BURSTINHIBIT=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index 319b8d8c40cb83894ed6d6590e8289bd19e7e523..b394da3a05244aa343faa571ace57d37ad7fd2b3 100644 (file)
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -186,3 +186,5 @@ CONFIG_BR3_MACHINE_UPMA=y
 CONFIG_BR3_PORTSIZE_16BIT=y
 CONFIG_OR3_AM_32_KBYTES=y
 CONFIG_OR3_BI_BURSTINHIBIT=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index f60527b361a135af032170c85c5721974bd5da62..274fbddf99603de0cbbf1e03f0510fa4a16f1e9a 100644 (file)
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -185,3 +185,5 @@ CONFIG_BR3_MACHINE_UPMA=y
 CONFIG_BR3_PORTSIZE_16BIT=y
 CONFIG_OR3_AM_32_KBYTES=y
 CONFIG_OR3_BI_BURSTINHIBIT=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 33e536ce182f50276d79facab5da3c04cf074bbd..6e6fc54d5109ed02f653812702d4a3e84603f4b5 100644 (file)
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -178,3 +178,5 @@ CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_CHT_TWO_CLOCK=y
 CONFIG_OR3_CST_ONE_CLOCK=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_8=y

diff --git a/configs/MPC837XEMDS_SLAVE_defconfig b/configs/MPC837XEMDS_SLAVE_defconfig
index 7d1f40517114c50cb092ead176edd3986bc0a909..421e176226e5fce0bd16ea0b635ac9f2506f8ce8 100644 (file)
--- a/configs/MPC837XEMDS_SLAVE_defconfig
+++ b/configs/MPC837XEMDS_SLAVE_defconfig
@@ -131,3 +131,5 @@ CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_CHT_TWO_CLOCK=y
 CONFIG_OR3_CST_ONE_CLOCK=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_8=y

diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index d4515cbb8c33a442798616689551fde90d820e1d..cd03f3ff9ec1de934e157ffe12936f500c22f714 100644 (file)
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -154,3 +154,5 @@ CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_CHT_TWO_CLOCK=y
 CONFIG_OR3_CST_ONE_CLOCK=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_8=y

diff --git a/configs/MPC837XERDB_SLAVE_defconfig b/configs/MPC837XERDB_SLAVE_defconfig
index 9730aefd54836af2df503dc2e6ac72b475ee106f..c90ebc8d7eb46fe500504c1884b6b41891c8cb51 100644 (file)
--- a/configs/MPC837XERDB_SLAVE_defconfig
+++ b/configs/MPC837XERDB_SLAVE_defconfig
@@ -132,3 +132,5 @@ CONFIG_OR2_SETA_EXTERNAL=y
 CONFIG_OR2_XACS_EXTENDED=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_8=y

diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 7bf081a20bf187a065538b0c84ccbdc9f6160846..95f47962814c984312973a8d45fc00c7a306b059 100644 (file)
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -175,3 +175,5 @@ CONFIG_OR2_SETA_EXTERNAL=y
 CONFIG_OR2_XACS_EXTENDED=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_8=y

diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index f5746cfad710c9fb0ffae78c7d3066c58184308c..9d9f105f75da5fb81db47b90dc4d347eb58f7aea 100644 (file)
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -147,3 +147,5 @@ CONFIG_OR0_ACS_QUARTER_CYCLE_EARLIER=y
 CONFIG_OR0_CSNT_EARLIER=y
 CONFIG_OR0_SCY_5=y
 CONFIG_OR0_TRLX_RELAXED=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_8=y

diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index 9c1ab75e0095c2013da697d1c127d23b19f816d7..bc4c2a91fb213cc014cd3195e6683ed0111392cc 100644 (file)
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -131,3 +131,5 @@ CONFIG_OR1_XACS_EXTENDED=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_TRLX_RELAXED=y
 CONFIG_OR1_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 0f1cc637cfcfadad1f12d2907df6a8171d141882..af93aef1be613898d22ab2d4d0afa135d867640d 100644 (file)
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -129,3 +129,5 @@ CONFIG_OR1_XACS_EXTENDED=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_TRLX_RELAXED=y
 CONFIG_OR1_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index f835868209f9de5e2f242c80d84a3f48e7b074c7..d9b1642671a8861fd9a26ee67f8daae18b70fd90 100644 (file)
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -170,3 +170,5 @@ CONFIG_OR3_AM_32_KBYTES=y
 CONFIG_OR3_CSNT_EARLIER=y
 CONFIG_OR3_SCY_1=y
 CONFIG_OR3_TRLX_RELAXED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index 7751e5a8989b641cb3296ce14975dfe369fb6178..941efcdf9aa509af6974c0930a23ac604a885277 100644 (file)
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -192,3 +192,6 @@ CONFIG_OR4_CSNT_EARLIER=y
 CONFIG_OR4_EAD_EXTRA=y
 CONFIG_OR4_SCY_2=y
 CONFIG_OR4_TRLX_RELAXED=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y
+CONFIG_LCRR_EADC_2=y

diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 2bb31588734e7a05bd37c8c3ac090f891b9ec05b..4929a6039b409001cf4e4ffa567de876c4bd84bd 100644 (file)
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -154,3 +154,6 @@ CONFIG_OR3_CSNT_EARLIER=y
 CONFIG_OR3_EAD_EXTRA=y
 CONFIG_OR3_SCY_2=y
 CONFIG_OR3_TRLX_RELAXED=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y
+CONFIG_LCRR_EADC_2=y

diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index 5eb5c939ebbe6180e7d15dccfac097bf59633024..afe424b8df8b1819a6a517656a72d231069fcc24 100644 (file)
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -179,3 +179,6 @@ CONFIG_BR3_PORTSIZE_16BIT=y
 CONFIG_OR3_AM_256_MBYTES=y
 CONFIG_OR3_SCY_4=y
 CONFIG_OR3_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index 0ad8801df955fbde31853c146460d6cb408c8c6b..1a78680bd0b5cfdf55a1aea22217aa67ef4e9a12 100644 (file)
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -157,3 +157,6 @@ CONFIG_OR2_EAD_EXTRA=y
 CONFIG_OR2_SCY_2=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_4_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index 8dfc4438add1428eec633e0ec3e8ade4c211a168..d874149fe366c61c0b4017d8b05be349af769911 100644 (file)
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -157,3 +157,6 @@ CONFIG_BR3_PORTSIZE_16BIT=y
 CONFIG_OR3_AM_256_MBYTES=y
 CONFIG_OR3_SCY_5=y
 CONFIG_OR3_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index 1a84ff5e0bb2d6518235b0357cb9d63e665f36e2..32d098028a795175986be28a9457503b932f9676 100644 (file)
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -179,3 +179,6 @@ CONFIG_BR3_PORTSIZE_16BIT=y
 CONFIG_OR3_AM_256_MBYTES=y
 CONFIG_OR3_SCY_4=y
 CONFIG_OR3_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig
index a746f195e65a6de0eba7b4da0aa48e8ed9e56cc3..26d9a7cf7af3ec04b80ab1bfb9252cce36f31270 100644 (file)
--- a/configs/kmvect1_defconfig
+++ b/configs/kmvect1_defconfig
@@ -177,3 +177,6 @@ CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y
 CONFIG_OR3_CSNT_EARLIER=y
 CONFIG_OR3_SCY_3=y
 CONFIG_OR3_TRLX_RELAXED=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index f1559bef548b8dc376eadd556efeb8b1ae34158f..0789ecd586a2e54b0f86fe69b8bd2ce17da673a1 100644 (file)
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -122,3 +122,5 @@ CONFIG_BR2_PORTSIZE_8BIT=y
 CONFIG_OR2_AM_32_KBYTES=y
 CONFIG_OR2_SCY_4=y
 CONFIG_OR2_EHTR_1_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig
index a213f038ee4937adbfef3f1f4728c8b9a6cdd785..a363070dd8702216c85e4492bf810de2471f7565 100644 (file)
--- a/configs/sbc8349_PCI_33_defconfig
+++ b/configs/sbc8349_PCI_33_defconfig
@@ -106,3 +106,5 @@ CONFIG_OR0_XACS_EXTENDED=y
 CONFIG_OR0_XAM_SET=y
 CONFIG_OR0_TRLX_RELAXED=y
 CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig
index 321c3d40735a7fbf49ddcd58886649fa5fc2f04e..215f31df282498fc67998f1c1799f11af894fe92 100644 (file)
--- a/configs/sbc8349_PCI_66_defconfig
+++ b/configs/sbc8349_PCI_66_defconfig
@@ -106,3 +106,5 @@ CONFIG_OR0_XACS_EXTENDED=y
 CONFIG_OR0_XAM_SET=y
 CONFIG_OR0_TRLX_RELAXED=y
 CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig
index 865a3ef74a542232a5cf2e8d4510f56ca04ecab3..d492b861d5ced3f08430e748911aeb5cca2b853d 100644 (file)
--- a/configs/sbc8349_defconfig
+++ b/configs/sbc8349_defconfig
@@ -84,3 +84,5 @@ CONFIG_OR0_XACS_EXTENDED=y
 CONFIG_OR0_XAM_SET=y
 CONFIG_OR0_TRLX_RELAXED=y
 CONFIG_OR0_EHTR_8_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index b11a26c2fc135502fd29683287e90afa3907aa1c..9f05b5693f916f716bc1a9b3e49b5a820c69dc7f 100644 (file)
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -130,3 +130,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_5=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index 72cb274348ebcaa88e5f2d972c28e150056f5d97..a1f966251897cb9453a3a5ce164490ca082b8aa3 100644 (file)
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -130,3 +130,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_5=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index f36404deb4d1e79206a355ec735d90acbc707056..2477ee5ca43036ad5f59f8d9ea69cf5496a495a6 100644 (file)
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -130,3 +130,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_5=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index 0ade98545a3d9fe5014b1aee39ce64afe1173aca..da16d5dbfa6242cc11b7424c899d9740fd0e2015 100644 (file)
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -130,3 +130,5 @@ CONFIG_OR1_CSNT_EARLIER=y
 CONFIG_OR1_SCY_5=y
 CONFIG_OR1_XAM_SET=y
 CONFIG_OR1_EHTR_NORMAL=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
index 28e386db24632953886f8f299dff7f4a766f773f..c970cde05eb43f8e1861754666340adf73cf5638 100644 (file)
--- a/configs/suvd3_defconfig
+++ b/configs/suvd3_defconfig
@@ -175,3 +175,6 @@ CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y
 CONFIG_OR3_CSNT_EARLIER=y
 CONFIG_OR3_SCY_3=y
 CONFIG_OR3_TRLX_RELAXED=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index fb18a46ec618e91ade8048aae597b545a0738c3b..550f524a3cf0ea04ac4a011c618c098cd902bed8 100644 (file)
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -157,3 +157,6 @@ CONFIG_OR2_EAD_EXTRA=y
 CONFIG_OR2_SCY_2=y
 CONFIG_OR2_TRLX_RELAXED=y
 CONFIG_OR2_EHTR_4_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index a034f302b23e8e4f6d129c22d7053a3a63994d55..d5ec8e5bf2e7da7de0a27ca7b63b13f57910ca51 100644 (file)
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -182,3 +182,6 @@ CONFIG_OR3_CSNT_EARLIER=y
 CONFIG_OR3_SCY_2=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_4_CYCLE=y
+CONFIG_LCRR_DBYP_PLL_BYPASSED=y
+CONFIG_LCRR_EADC_1=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig
index 79f6430f913628a9187d7451023d7bd02ed33da3..0a9521b2512f93bf57fe36a90a6d31c902d017f3 100644 (file)
--- a/configs/ve8313_defconfig
+++ b/configs/ve8313_defconfig
@@ -145,3 +145,5 @@ CONFIG_OR3_SCY_15=y
 CONFIG_OR3_XACS_EXTENDED=y
 CONFIG_OR3_TRLX_RELAXED=y
 CONFIG_OR3_EHTR_8_CYCLE=y
+CONFIG_LCRR_EADC_3=y
+CONFIG_LCRR_CLKDIV_2=y

diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index 9ac88c0a4ba1984234fdc8f3483f6988787e6f6a..24bbba1aa73f4763d4b2fc188733f083a97901fa 100644 (file)
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -118,3 +118,4 @@ CONFIG_BR1_MACHINE_GPCM=y
 CONFIG_BR1_PORTSIZE_32BIT=y
 CONFIG_OR1_AM_256_KBYTES=y
 CONFIG_OR1_SETA_EXTERNAL=y
+CONFIG_LCRR_CLKDIV_4=y

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index c4b604cc0d02fdb3edcb32738b96b6f356cec1d2..e625f8709cb1c14d27d5160d08641bef0b6aa5d2 100644 (file)
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -126,8 +126,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00040000
 
 /*

diff --git a/include/configs/MPC8313ERDB_NAND.h b/include/configs/MPC8313ERDB_NAND.h
index aaf92fe37ab3d5feeef7d94764cf8cff45299a87..08c5b56da71daa04650e9cd745f42b3880d505c2 100644 (file)
--- a/include/configs/MPC8313ERDB_NAND.h
+++ b/include/configs/MPC8313ERDB_NAND.h
@@ -191,8 +191,6 @@
 /*
  * Local Bus LCRR and LBCR regs
  */
-#define CONFIG_SYS_LCRR_EADC   LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    (0x00040000 /* TODO */ \
                                | (0xFF << LBCR_BMT_SHIFT) \
                                | 0xF)  /* 0x0004ff0f */

diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h
index 608565a139c4220091f901979b540539a9b029d1..2a39ffa6c2c2ff9bfbe8a22b1e99e51c7546d34a 100644 (file)
--- a/include/configs/MPC8313ERDB_NOR.h
+++ b/include/configs/MPC8313ERDB_NOR.h
@@ -164,8 +164,6 @@
 /*
  * Local Bus LCRR and LBCR regs
  */
-#define CONFIG_SYS_LCRR_EADC   LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    (0x00040000 /* TODO */ \
                                | (0xFF << LBCR_BMT_SHIFT) \
                                | 0xF)  /* 0x0004ff0f */

diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 10742ae312a8895dc474b459291caad1515ded77..b49022b916d1977bc40a9d441d90e119532a1c72 100644 (file)
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -121,8 +121,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00040000
 #define CONFIG_FSL_ELBC                1
 

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 2ef16e543d815cf68cff92631764f4310ea28457..497c60bcdaa798c64fa16369515e09faefc503f6 100644 (file)
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -118,8 +118,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00000000
 
 /*

diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 195d62ce50d8a6fd74279f1f6c0235f40956e599..520f01f177dc5fdbbaaf3aa97399681f5a91d2e8 100644 (file)
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -118,8 +118,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00000000
 
 /*

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index b64a91183849a69487d0b23dc0b7373685b6469e..2043344524848f191eb01eaf43ff7e72a02cfec9 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -161,8 +161,6 @@
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 /*

diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 35210ccfd2494bd13f9ca84c9b268503895279cf..70fc29e8ade5a406659696d5057effc04d975734 100644 (file)
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -158,8 +158,6 @@
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 /*

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index d8e86f21ea14e00c99e8f4f86863e598fd2ef04a..6f040a3d6dc791c21a1f6d8afdace5d494d75d2c 100644 (file)
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -258,8 +258,6 @@ boards, we say we have two, but don't display a message if we find only one. */
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
                                /* LB sdram refresh timer, about 6us */

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 5d469073312e255b3d81bd2efb0c1b436d620fd6..5f0050a97d5bf3bb0e77a876889326bf309949e5 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -139,8 +139,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
 #define CONFIG_SYS_LBC_LBCR            0x00000000
 #define CONFIG_FSL_ELBC                1
 

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index b6756c3794c3d5e3302fa594e9b848c2dc28e993..ef23d0040859e6470f3748da55bcbce4d5c94368 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -163,8 +163,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
 #define CONFIG_SYS_LBC_LBCR            0x00000000
 #define CONFIG_FSL_ELBC                1
 

diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index d713c695f7c94c8046a5490f7d7d4d3534783840..8171f8531ba1ad5d4a992ef418516def2725bd3c 100644 (file)
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -16,18 +16,6 @@
  */
 #define CONFIG_E300            1       /* E300 Family */
 
-/*
- * Local Bus LCRR
- *    LCRR:  DLL bypass, Clock divider is 8
- *
- *    for CSB = 266 MHz it gives LCB clock frequency = 33 MHz
- *
- * External Local Bus rate is
- *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
-
 /* board pre init: do not call, nothing to do */
 
 /* detect the number of flash banks */

diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h
index b4516267f151238b3939262ed737a4d49e3aedb1..a0642aef1124b30e612acf61a1bfe2ce0f524ef1 100644 (file)
--- a/include/configs/caddy2.h
+++ b/include/configs/caddy2.h
@@ -104,7 +104,6 @@
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #undef CONFIG_SYS_LB_SDRAM     /* if board has SDRAM on local bus */

diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 9cb5df4a72e3a81b0cd6b30b49106f560804a0a0..0919bb544d0a45665ac6b09176e0d3580e5aac45 100644 (file)
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -115,8 +115,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00040000
 
 /*

diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index bd8f786a5802932c8c171eb9b212b9f5cd0e292f..174c181ffafacecbb240974e129ade5b6591d9f8 100644 (file)
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -39,8 +39,6 @@
 /*
  * Local Bus LCRR and LBCR regs
  */
-#define CONFIG_SYS_LCRR_EADC           LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            (0x00040000 |\
                                         (0xFF << LBCR_BMT_SHIFT) |\
                                         0xF)

diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index 08185894b8e8fc7ee3001b015f3377db1dc1a187..7034c7033f27593d4025cc3929326b0df299126d 100644 (file)
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -296,13 +296,6 @@
 /* EEprom support */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         2
 
-/*
- * Local Bus Configuration & Clock Setup
- */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_EADC           LCRR_EADC_2
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_4
-
 /*
  * PAXE on the local bus CS3
  */

diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index e0c3065ac6a8ba4eb6bb61d592b28dd5ee4c6584..bbf3783ef93859d4b94f0d56083dbbdfa8fb48c0 100644 (file)
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -276,13 +276,6 @@
 /* EEprom support */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         2
 
-/*
- * Local Bus Configuration & Clock Setup
- */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_EADC           LCRR_EADC_2
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_4
-
 /*
  * PAXE on the local bus CS3
  */

diff --git a/include/configs/kmopti2.h b/include/configs/kmopti2.h
index c2f4188a2246048a7455c967943c60e855ec7880..77dc6a93b1946443f723e45fc9b98203f6205941 100644 (file)
--- a/include/configs/kmopti2.h
+++ b/include/configs/kmopti2.h
@@ -294,10 +294,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE   0xA0000000    /* PAXG */

diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h
index b1ba474e786dfe860fcd050057e0fd7b712ac1d5..561ae7a14839753534ca895640a33f580c02b6bc 100644 (file)
--- a/include/configs/kmsupx5.h
+++ b/include/configs/kmsupx5.h
@@ -294,10 +294,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE   0xA0000000    /* PAXG */

diff --git a/include/configs/kmtegr1.h b/include/configs/kmtegr1.h
index d3f7c2c4d347fce7e6d578c64e145cf1d79f73f8..b4ebde8ba5a5be1bdc3533784e0fd88a2af55c6d 100644 (file)
--- a/include/configs/kmtegr1.h
+++ b/include/configs/kmtegr1.h
@@ -346,10 +346,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 /* must be after the include because KMBEC_FPGA is otherwise undefined */

diff --git a/include/configs/kmtepr2.h b/include/configs/kmtepr2.h
index 796040995d5862fd2bdae759a924e44ac649cf43..80f6f4daa46ab70f608ea89b8c2169be4298adcc 100644 (file)
--- a/include/configs/kmtepr2.h
+++ b/include/configs/kmtepr2.h
@@ -294,10 +294,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE   0xA0000000    /* PAXG */

diff --git a/include/configs/kmvect1.h b/include/configs/kmvect1.h
index cfbf150b11967328d5ffdb9dc04f38b0db2bc5c2..9e301a9728db9dca003a42f6c79c099ad0b1f8f5 100644 (file)
--- a/include/configs/kmvect1.h
+++ b/include/configs/kmvect1.h
@@ -338,10 +338,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE           0xA0000000

diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index ce3a899480064c7e4919bec1bc831c0f0b389eb9..aca4a655e03d381cc93af87f95c0cc9d36dec88c 100644 (file)
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -130,8 +130,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00040000
 
 /*

diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 775bbe417afc57dabb745c741f9bf3fff893e1d4..6bad65113393a97ac7df7e410a3e48a8edc4b4d5 100644 (file)
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -131,8 +131,6 @@
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_DBYP   LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #undef CONFIG_SYS_LB_SDRAM     /* if board has SDRAM on local bus */

diff --git a/include/configs/strider.h b/include/configs/strider.h
index e4584db7d5d792c088ef4632445a66c2d0afac08..69e22fb141efcb279d559a5014194cd36731c914 100644 (file)
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -115,8 +115,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP           LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV         LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR            0x00040000
 
 /*

diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h
index e3653ea924aeb62787525aa54ce37f31ef04d7b0..ad3323fd0e107e9d01f5f3c75d8a0fa661df6294 100644 (file)
--- a/include/configs/suvd3.h
+++ b/include/configs/suvd3.h
@@ -291,10 +291,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE           0xA0000000

diff --git a/include/configs/tuge1.h b/include/configs/tuge1.h
index 81e11d2236117cf1cb312caf7fd61ed5fa16ef77..466f75a44eb90a890dc58dd4e34e7b2f9beb8bad 100644 (file)
--- a/include/configs/tuge1.h
+++ b/include/configs/tuge1.h
@@ -294,10 +294,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE   0xA0000000    /* PAXG */

diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h
index 28416af225d481bb95e1569fcf6a21d8328ab53d..02e24f002a8270192e36284c0c116f4882a41d0f 100644 (file)
--- a/include/configs/tuxx1.h
+++ b/include/configs/tuxx1.h
@@ -294,10 +294,6 @@
 /*
  * Local Bus Configuration & Clock Setup
  */
-#define CONFIG_SYS_LCRR_DBYP   0x80000000
-#define CONFIG_SYS_LCRR_EADC   0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV 0x00000002
-
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #define CONFIG_SYS_APP1_BASE   0xA0000000    /* PAXG */

diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index 76fe3be446067eab749319db69a9b67cd7fc8e25..8b20bfd10033240707b0a87736340714621681c6 100644 (file)
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -133,9 +133,6 @@
 /*
  * Local Bus LCRR and LBCR regs
  */
-#define CONFIG_SYS_LCRR_EADC   LCRR_EADC_3
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
-
 #define CONFIG_SYS_LBC_LBCR    0x00040000
 
 #define CONFIG_SYS_LBC_MRTPR   0x20000000

diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index 1a3a55b707e44a92d97f355af47ebff71240850f..d50a5263a708a0811623974b72b5aba898efd470 100644 (file)
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -104,7 +104,6 @@
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR    0x00000000
 
 #undef CONFIG_SYS_LB_SDRAM     /* if board has SDRAM on local bus */

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 30b8b55132575c23b7cc316444df7af236ee6c33..c6c4689a2f13a9e1da57300a2d5c6f613594b760 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3203,9 +3203,6 @@ CONFIG_SYS_LBC_SDRAM_BASE_PHYS
 CONFIG_SYS_LBC_SDRAM_SIZE
 CONFIG_SYS_LB_SDRAM
 CONFIG_SYS_LCD_BASE
-CONFIG_SYS_LCRR_CLKDIV
-CONFIG_SYS_LCRR_DBYP
-CONFIG_SYS_LCRR_EADC
 CONFIG_SYS_LDB_CLOCK
 CONFIG_SYS_LDSCRIPT
 CONFIG_SYS_LED_BASE