val = readl(CFG_SAR_REG); /* SAR - Sample At Reset */
boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
- switch (boot_device) {
#ifdef BOOT_FROM_NAND
- case BOOT_FROM_NAND:
+ if (BOOT_FROM_NAND(boot_device))
return BOOT_DEVICE_NAND;
#endif
#ifdef BOOT_FROM_MMC
- case BOOT_FROM_MMC:
- case BOOT_FROM_MMC_ALT:
+ if (BOOT_FROM_MMC(boot_device))
return BOOT_DEVICE_MMC1;
#endif
- case BOOT_FROM_UART:
+#ifdef BOOT_FROM_UART
+ if (BOOT_FROM_UART(boot_device))
return BOOT_DEVICE_UART;
+#endif
#ifdef BOOT_FROM_SATA
- case BOOT_FROM_SATA:
+ if (BOOT_FROM_SATA(boot_device))
return BOOT_DEVICE_SATA;
#endif
- case BOOT_FROM_SPI:
+#ifdef BOOT_FROM_SPI
+ if (BOOT_FROM_SPI(boot_device))
return BOOT_DEVICE_SPI;
- default:
- return BOOT_DEVICE_BOOTROM;
- };
+#endif
+ return BOOT_DEVICE_BOOTROM;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
#define BOOT_DEV_SEL_OFFS 3
#define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS)
-#define BOOT_FROM_UART 0x30
-#define BOOT_FROM_SPI 0x38
+#define BOOT_FROM_UART(x) (x == 0x30)
+#define BOOT_FROM_SPI(x) (x == 0x38)
#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(20)) ? \
200000000 : 166000000)
#define BOOT_DEV_SEL_OFFS 4
#define BOOT_DEV_SEL_MASK (0x3f << BOOT_DEV_SEL_OFFS)
-#define BOOT_FROM_NAND 0x0A
-#define BOOT_FROM_SATA 0x2A
-#define BOOT_FROM_UART 0x28
-#define BOOT_FROM_SPI 0x32
-#define BOOT_FROM_MMC 0x30
-#define BOOT_FROM_MMC_ALT 0x31
+#define BOOT_FROM_NAND(x) (x == 0x0A)
+#define BOOT_FROM_SATA(x) (x == 0x2A)
+#define BOOT_FROM_UART(x) (x == 0x28)
+#define BOOT_FROM_SPI(x) (x == 0x32)
+#define BOOT_FROM_MMC(x) (x == 0x30 || x == 0x31)
#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(15)) ? \
200000000 : 250000000)
#define BOOT_DEV_SEL_OFFS 11
#define BOOT_DEV_SEL_MASK (0x7 << BOOT_DEV_SEL_OFFS)
-#define BOOT_FROM_NAND 0x1
-#define BOOT_FROM_UART 0x2
-#define BOOT_FROM_SPI 0x3
+#define BOOT_FROM_NAND(x) (x == 0x1)
+#define BOOT_FROM_UART(x) (x == 0x2)
+#define BOOT_FROM_SPI(x) (x == 0x3)
#define CFG_SYS_TCLK 200000000 /* 200MHz */
#elif defined(CONFIG_ARMADA_XP)
#define BOOT_DEV_SEL_OFFS 5
#define BOOT_DEV_SEL_MASK (0xf << BOOT_DEV_SEL_OFFS)
-#define BOOT_FROM_UART 0x2
-#define BOOT_FROM_SPI 0x3
+#define BOOT_FROM_UART(x) (x == 0x2)
+#define BOOT_FROM_SPI(x) (x == 0x3)
#define CFG_SYS_TCLK 250000000 /* 250MHz */
#endif