mmc: sdhci: Fix HISPD bit handling for MMC HS 52MHz mode

Set High Speed Enable bit for MMC High Speed (52MHz) mode.

Fixes: f12341a95295 ("mmc: sdhci: Fix HISPD bit handling")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index c6b250b9a1b5f64de83ab938813b17a06a1039a7..1389c18533feac10aadd1f8289792b7ccd842fed 100644 (file)
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -682,6 +682,7 @@ static int sdhci_set_ios(struct mmc *mmc)
        if (!no_hispd_bit) {
                if (mmc->selected_mode == MMC_HS ||
                    mmc->selected_mode == SD_HS ||
+                   mmc->selected_mode == MMC_HS_52 ||
                    mmc->selected_mode == MMC_DDR_52 ||
                    mmc->selected_mode == MMC_HS_200 ||
                    mmc->selected_mode == MMC_HS_400 ||