imx: Easy enabling of SION per-pin using MUX_MODE_SION helper macro

The macro allows easy setting in per-pin, as for example:

,----
| imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SION);
`----

The IOMUX_CONFIG_SION allows for reading PAD value from PSR register.

The following quote from the datasheet:

,----
| ...
| 28.4.2.2 GPIO Write Mode
| The programming sequence for driving output signals should be as follows:
| 1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if need
| to read loopback pad value through PSR
| 2. Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b).
| 3. Write value to data register (GPIO_DR).
| ...
`----

This fixes the gpio_get_value to properly work when a GPIO is set for
output and has no conflicts.

Thanks for Benoît Thébaudeau <benoit.thebaudeau@advansee.com>, Fabio
Estevam <fabio.estevam@freescale.com> and Eric Bénard
<eric@eukrea.com> for helping to properly trace this down.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h
index dc2b3ef47a43ba78ece3d7976f444b045fd80d7b..dec11a133044bd54bf54a92a876ca3c0cc04cfa3 100644 (file)
--- a/arch/arm/include/asm/imx-common/iomux-v3.h
+++ b/arch/arm/include/asm/imx-common/iomux-v3.h
@@ -63,6 +63,8 @@ typedef u64 iomux_v3_cfg_t;
 #define MUX_SEL_INPUT_SHIFT    59
 #define MUX_SEL_INPUT_MASK     ((iomux_v3_cfg_t)0xf << MUX_SEL_INPUT_SHIFT)
 
+#define MUX_MODE_SION          ((iomux_v3_cfg_t)IOMUX_CONFIG_SION << \
+       MUX_MODE_SHIFT)
 #define MUX_PAD_CTRL(x)                ((iomux_v3_cfg_t)(x) << MUX_PAD_CTRL_SHIFT)
 
 #define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \