imx: mx6: ddr add mpzqlp2ctl entry

Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>

diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
index 235a44a554f30cb68b50d560b3158649af2a50da..b7bae7b17f9baf1e5bb2a7806734255650abc685 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
@@ -414,6 +414,8 @@ struct mx6_mmdc_calibration {
        /* write delay */
        u32 p0_mpwrdlctl;
        u32 p1_mpwrdlctl;
+       /* lpddr2 zq hw calibration */
+       u32 mpzqlp2ctl;
 };
 
 /* configure iomux (pinctl/padctl) */