]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sandbox: pci: Create a new sandbox_pci_read_bar() function
authorSimon Glass <sjg@chromium.org>
Wed, 25 Sep 2019 14:56:42 +0000 (08:56 -0600)
committerBin Meng <bmeng.cn@gmail.com>
Tue, 8 Oct 2019 05:57:48 +0000 (13:57 +0800)
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
arch/sandbox/include/asm/test.h
drivers/misc/Makefile
drivers/misc/swap_case.c
drivers/pci/pci-emul-uclass.c

index 1b21af6bed7c951ddf89d2068f94886ed752cfe9..cd2b9e3155d73adb1a38c3191cb00477f22c2f7c 100644 (file)
@@ -198,4 +198,19 @@ int sandbox_get_pch_spi_protect(struct udevice *dev);
  */
 int sandbox_get_pci_ep_irq_count(struct udevice *dev);
 
+/**
+ * sandbox_pci_read_bar() - Read the BAR value for a read_config operation
+ *
+ * This is used in PCI emulators to read a base address reset. This has special
+ * rules because when the register is set to 0xffffffff it can be used to
+ * discover the type and size of the BAR.
+ *
+ * @barval: Current value of the BAR
+ * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or
+ *             PCI_BASE_ADDRESS_MEM_TYPE_32)
+ * @size: Size of BAR in bytes
+ * @return BAR value to return from emulator
+ */
+uint sandbox_pci_read_bar(u32 barval, int type, uint size);
+
 #endif
index 509c588582d2e0f51ca0ca85b8f7b1e2bc3ac26c..0001d105baee00870d5fe47edce1dd3212424e01 100644 (file)
@@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
+obj-$(CONFIG_SANDBOX) += swap_case.o
 endif
 
 ifdef CONFIG_DM_I2C
@@ -52,7 +53,6 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
 obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
-obj-$(CONFIG_SANDBOX) += swap_case.o
 obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
 obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
 obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
index 75fe6416707a9aab2ea87e7d683a8e7b640f17d9..11189d16c83ae87fa5227d3b198368db8e288048 100644 (file)
@@ -139,25 +139,13 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset,
        case PCI_BASE_ADDRESS_4:
        case PCI_BASE_ADDRESS_5: {
                int barnum;
-               u32 *bar, result;
+               u32 *bar;
 
                barnum = pci_offset_to_barnum(offset);
                bar = &plat->bar[barnum];
 
-               result = *bar;
-               if (*bar == 0xffffffff) {
-                       if (barinfo[barnum].type) {
-                               result = (~(barinfo[barnum].size - 1) &
-                                       PCI_BASE_ADDRESS_IO_MASK) |
-                                       PCI_BASE_ADDRESS_SPACE_IO;
-                       } else {
-                               result = (~(barinfo[barnum].size - 1) &
-                                       PCI_BASE_ADDRESS_MEM_MASK) |
-                                       PCI_BASE_ADDRESS_MEM_TYPE_32;
-                       }
-               }
-               debug("r bar %d=%x\n", barnum, result);
-               *valuep = result;
+               *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type,
+                                              barinfo[barnum].size);
                break;
        }
        case PCI_CAPABILITY_LIST:
index fd87b3ea4e60df915e50e572889433a9b11a50c1..0dcf937d9a67bc28a562e6496d3c5cbb68935416 100644 (file)
@@ -42,6 +42,26 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
        return *emulp ? 0 : -ENODEV;
 }
 
+uint sandbox_pci_read_bar(u32 barval, int type, uint size)
+{
+       u32 result;
+
+       result = barval;
+       if (result == 0xffffffff) {
+               if (type == PCI_BASE_ADDRESS_SPACE_IO) {
+                       result = (~(size - 1) &
+                               PCI_BASE_ADDRESS_IO_MASK) |
+                               PCI_BASE_ADDRESS_SPACE_IO;
+               } else {
+                       result = (~(size - 1) &
+                               PCI_BASE_ADDRESS_MEM_MASK) |
+                               PCI_BASE_ADDRESS_MEM_TYPE_32;
+               }
+       }
+
+       return result;
+}
+
 static int sandbox_pci_emul_post_probe(struct udevice *dev)
 {
        struct sandbox_pci_emul_priv *priv = dev->uclass->priv;