]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
authorPeng Fan <peng.fan@nxp.com>
Thu, 5 May 2022 07:43:36 +0000 (15:43 +0800)
committerStefano Babic <sbabic@denx.de>
Fri, 20 May 2022 07:30:28 +0000 (09:30 +0200)
Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
board/data_modul/imx8mm_edm_sbc/spl.c
configs/imx8mm_data_modul_edm_sbc_defconfig
include/configs/imx8mm_data_modul_edm_sbc.h

index 36cad14fc413c862dedf010c3db9214364110886..f5063eb8c1917f38ab39a41e9f2ea554f31a2afc 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL  (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
 
-static const iomux_v3_cfg_t uart_pads[] = {
-       IMX8MM_PAD_UART3_RXD_UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-       IMX8MM_PAD_UART3_TXD_UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
 static const iomux_v3_cfg_t wdog_pads[] = {
        IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
 };
@@ -47,8 +41,6 @@ static void data_modul_imx8mm_edm_sbc_early_init_f(void)
        imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 
        set_wdog_reset(wdog);
-
-       imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
 }
 
 static int data_modul_imx8mm_edm_sbc_board_power_init(void)
@@ -149,8 +141,6 @@ void board_init_f(ulong dummy)
 
        data_modul_imx8mm_edm_sbc_early_init_f();
 
-       preloader_console_init();
-
        /* Clear the BSS. */
        memset(__bss_start, 0, __bss_end - __bss_start);
 
@@ -160,6 +150,8 @@ void board_init_f(ulong dummy)
                hang();
        }
 
+       preloader_console_init();
+
        ret = uclass_get_device_by_name(UCLASS_CLK,
                                        "clock-controller@30380000",
                                        &dev);
index edceb18201141045d44085ce7bf2d6bdb0b5cef4..5eb99c5d192cf7d3539a772b474239fe8f6f25ce 100644 (file)
@@ -200,7 +200,6 @@ CONFIG_DM_RTC=y
 CONFIG_RTC_M41T62=y
 CONFIG_CONS_INDEX=2
 CONFIG_DM_SERIAL=y
-# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_MXC_UART=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
index de56640cd84af9f164ff22f5f794b6a9eb4e1c53..67667dd523d43678a7000bba7459a17d5352a46f 100644 (file)
@@ -41,8 +41,6 @@
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x40000000 /* Minimum 1 GiB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
 #define CONFIG_SYS_MAXARGS             64