]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
spi: sun4i: Poll for rxfifo to be filled up
authorJagan Teki <jagan@amarulasolutions.com>
Wed, 27 Feb 2019 14:32:05 +0000 (20:02 +0530)
committerJagan Teki <jagan@amarulasolutions.com>
Mon, 4 Mar 2019 12:38:56 +0000 (18:08 +0530)
To drain rx fifo the fifo need to poll for how much data has
been filled up in rx fifo.

To achieve this, the current code is using wait_for_bit logic
on control register with exchange burst mode mask, which is not
a proper way of waiting for fifo filled up.

So, add code for polling rxfifo to be filled up using fifo
status register.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
drivers/spi/sun4i_spi.c

index 38cc743c6144d9819d8f4c0fba7e932ef9d5ddf0..f5f2d5635a9ad0daa6a4f1483039d9a2c9dcac24 100644 (file)
@@ -31,6 +31,8 @@
 
 #include <asm/arch/clock.h>
 
+#include <linux/iopoll.h>
+
 #define SUN4I_FIFO_DEPTH       64
 
 #define SUN4I_RXDATA_REG       0x00
@@ -46,7 +48,6 @@
 #define SUN4I_CTL_LMTF                 BIT(6)
 #define SUN4I_CTL_TF_RST               BIT(8)
 #define SUN4I_CTL_RF_RST               BIT(9)
-#define SUN4I_CTL_XCH_MASK             0x0400
 #define SUN4I_CTL_XCH                  BIT(10)
 #define SUN4I_CTL_CS_MASK              0x3000
 #define SUN4I_CTL_CS(cs)               (((cs) << 12) & SUN4I_CTL_CS_MASK)
@@ -308,7 +309,7 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
        struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
 
        u32 len = bitlen / 8;
-       u32 reg;
+       u32 reg, rx_fifocnt;
        u8 nbytes;
        int ret;
 
@@ -343,10 +344,12 @@ static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen,
                reg = readl(&priv->regs->ctl);
                writel(reg | SUN4I_CTL_XCH, &priv->regs->ctl);
 
-               /* Wait transfer to complete */
-               ret = wait_for_bit_le32(&priv->regs->ctl, SUN4I_CTL_XCH_MASK,
-                                       false, SUN4I_SPI_TIMEOUT_US, false);
-               if (ret) {
+               /* Wait till RX FIFO to be empty */
+               ret = readl_poll_timeout(&priv->regs->fifo_sta, rx_fifocnt,
+                                        (((rx_fifocnt & SUN4I_FIFO_STA_RF_CNT_MASK) >>
+                                        SUN4I_FIFO_STA_RF_CNT_BITS) >= nbytes),
+                                        SUN4I_SPI_TIMEOUT_US);
+               if (ret < 0) {
                        printf("ERROR: sun4i_spi: Timeout transferring data\n");
                        sun4i_spi_set_cs(bus, slave_plat->cs, false);
                        return ret;