]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: rockchip: rk3288: rename mmc nodenames
authorJohan Jonker <jbx6244@gmail.com>
Mon, 2 May 2022 09:42:22 +0000 (11:42 +0200)
committerKever Yang <kever.yang@rock-chips.com>
Sun, 4 Sep 2022 12:00:38 +0000 (20:00 +0800)
The boot_devices constants for rk3288 were changed to match the
binding, but the dtsi file was not synced.
Fix by renaming the rk3288 mmc node names.
Also correct the clock name for "ciu-drive".

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3288.dtsi

index 9fb6d86bc1dd7b14d437d4758fd78cd5420433f4..53ee760b989bde0663cc92271cb679fc807b690b 100644 (file)
                ports = <&vopl_out>, <&vopb_out>;
        };
 
-       sdmmc: dwmmc@ff0c0000 {
+       sdmmc: mmc@ff0c0000 {
                compatible = "rockchip,rk3288-dw-mshc";
                max-frequency = <150000000>;
                clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
                         <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
-               clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0xff0c0000 0x4000>;
                status = "disabled";
        };
 
-       sdio0: dwmmc@ff0d0000 {
+       sdio0: mmc@ff0d0000 {
                compatible = "rockchip,rk3288-dw-mshc";
                max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
                         <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
-               clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0xff0d0000 0x4000>;
                status = "disabled";
        };
 
-       sdio1: dwmmc@ff0e0000 {
+       sdio1: mmc@ff0e0000 {
                compatible = "rockchip,rk3288-dw-mshc";
                max-frequency = <150000000>;
                clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>,
                         <&cru SCLK_SDIO1_DRV>, <&cru SCLK_SDIO1_SAMPLE>;
-               clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0xff0e0000 0x4000>;
                status = "disabled";
        };
 
-       emmc: dwmmc@ff0f0000 {
+       emmc: mmc@ff0f0000 {
                compatible = "rockchip,rk3288-dw-mshc";
                max-frequency = <150000000>;
                clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
                         <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
-               clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+               clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
                fifo-depth = <0x100>;
                interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                reg = <0xff0f0000 0x4000>;